2.1 Design targets

XiPAF’s synchrotron works in slow cycling mode, with an injection energy of 7 MeV and an extraction energy that varies from 60 to 230 MeV. The ramping time varies from 0.25 to 0.5 s and the maximum ramping speed is 5 T/s. The typical RF voltage and frequency patterns of XiPAF’s synchrotron are shown in Fig. 1. The voltage is ramped slowly in 10 ms to the maximum acceleration voltage to capture the beam adiabatically into the longitudinal bucket. The second harmonic RF only operates during the low-energy stage to increase the acceptance of the RF bucket and suppress the space charge effect. After reaching the target beam energy, the fundamental RF voltage is reduced to a low value to suppress the momentum spread and reduce power consumption.

Figure 1:Full-screen View

(Color online) Typical RF voltage and frequency pattern of XiPAF’s synchrotron. V₁ denotes the voltage of the first harmonic, and V₂ denotes the voltage of the second harmonic.

The design targets of the RF system of XiPAF’s synchrotron are listed in Table 1 [14]. The initial beam energy spread is a major limitation of the acceleration efficiency of low-energy proton synchrotrons working in the slow cycling mode. One solution is to use a debuncher cavity to reduce the injection beam’s energy spread, but this would make the whole system more complicated to build and operate. In the case of XiPAF, multiparticle simulation demonstrates that, with a relative large RF voltage of ∼800 V and good system stability, the RF bucket’s momentum acceptance becomes sufficiently large to directly accelerate the injection beam with high efficiency. Compactness is another important requirement for the system, as the free space on the ring left for the RF cavity is ≤1.0 m. For easy operation, we plan to use a low-power-consumption design and forced air to cool the system.

2.2 MA cores

The shunt impedance R_p of the MA core can be expressed as [16]

where r_o, r_i, and t are the outer radius, inner radius, and thickness of the core, respectively. The product $({\mu }_p^{\text{'}}Qf)$ is independent of the core size and is used to evaluate the performance of the magnetic material. Q is the Q value of the material, defined as ${\mu }_{\text{s}}^{\text{'}}/{\mu }_{\text{s}}^{″}$, and ${\mu }_{{}_{\text{s}}}^{\text{'}}-j{\mu }_{{}_{\text{s}}}^{″}$ is the complex permeability of the material. Here, ${\mu }_{\text{p}}^{\text{'}}$ is calculated as

As a dispersive material, the MA’s material property has a dependence on RF frequency f. The impedance of the MA core can be expressed as a parallel form Z_core = (R_p)//(jω L_p), where parallel inductance L_p is calculated as [16]

The material of the MA core used in this study is 1K107, produced by AT&M (www.AT&M.com). The thickness of the ribbon is 18 μ m and it is insulated by a 2-μ m SiO₂ electric insulator. The filling ratio of the core is ∼75%. Several small sample cores have been made to measure the material’s $({\mu }_p^{\text{'}}Qf)$ product. Based on the measured result, the r_o, r_i, and t values of the large-sized core are determined to be 450, 300, and 25 mm, respectively, to make the core’s impedance around 50 Ω at 1 MHz. Two large-sized cores (see Fig. 2) are fabricated to test their properties under high-power condition. Our test experiment shows that the large-sized core can sustain 2 kW instantaneous input power, corresponding to an average power density of 1.4 MW m^-3. The core works normally under a 500-W continuous power input without forced cooling [17]. With this power level, each core should be able to produce a voltage of >200 V; hence, six cores are sufficient for this project.

Figure 2:Full-screen View

(Color online) Large-sized MA core made of 1K107.

Six large-sized MA cores with similar $({\mu }_p^{\text{'}}Qf)$products and good appearance are selected for the project. The measured $({\mu }_p^{\text{'}}Qf)$ product and Q value of each core are shown in Fig. 3. The difference of $({\mu }_p^{\text{'}}Qf)$between each core is controlled to <±10% in the frequency range of 1–6 MHz. The shunt impedances of the cores range from 50 to 120 Ω.

Figure 3:Full-screen View

(Color online) (a) $({\mu }_p^{\text{'}}Qf)$ products and (b) Q values of large-sized MA cores.

2.3 Cavity structure and impedance

The cavity has one acceleration gap and each side of the gap has a quarter-wave resonator, each loaded with 3 MA cores. The mechanical structure of the cavity is shown in Fig. 4. As can be seen, three axial fans are installed at the downside of the cavity for core cooling. The diameter of the fan is 162 mm, and the maximum output wind velocity is 5.5 m/s. A detection circuit is installed at the gap to monitor the acceleration voltage for feedback control. The circuit consists of two bridge resistors with impedances of 40 Ω and 4 kΩ, respectively, and the divided voltage is then converted to a single-ended signal by a balun circuit and then transferred to a low-level-RF (LLRF) system.

Figure 4:Full-screen View

Left view of the cavity (left) and cross section from the front view (right).

The system employs a power feeding method called "Multiple Power Feeding," which means that each amplifier with an output impedance of 50 Ω is independently coupled with the MA core. The equivalent circuit of the cavity can be represented as shown in Fig. 5 [15], where C is the equivalent capacitance of the cavity. Here, C is calculated as

Figure 5:Full-screen View

Equivalent circuit of the cavity using multiple power feeding technology, where n represents the number of cores in the cavity.

where C_gap is the capacitance of accelerating gap and C_coax is the capacitance of coaxial resonator. Here, C_gap and C_coax are calculated as

where ϵ, S_cera, and d_cera are the relative dielectric permittivity, cross-sectional area, and length of the ceramic gap, respectively, and l_coax, r_cav, and r_in are the length of the coaxial resonator, the outer radius of the cavity, and the radius of the inner conductor, respectively. The impedance of each loop is obtained as

where n is the total number of MA cores in the cavity. The parameters of the cavity are summarized in Table 2.

The impedance seen by each amplifier is measured by a vector network analyzer. The measured results are compared with the calculated values as shown in Fig. 6 (where only one loop is shown as an example). The measured result is roughly consistent with the calculated result, which indicates that the real capacitance of the cavity is a little smaller than our estimation. The standing wave ratio is <2.0 in the working band; hence, the power reflection percentage should be <9%.

Figure 6:Full-screen View

(Color online) Impedance and standing wave ratio (SWR) of one loop as a function of RF frequency. Shown are the measured and calculated results of (a) impedance and (b) SWR.

2.4 RF power source

The block diagram of the whole system is shown in Fig. 7. Six wide-band solid-state amplifiers are used as the RF power source. As described in Sect. 2.1, the MA core’s impedance is designed to be ∼50 Ω, so that we can control the reflection power to an acceptable level without special impedance matching. The maximum output power of each amplifier is ∼300 W. The gain of the amplifier decreases from 31.5 to 29.5 dB in the frequency range of 1–6 MHz. The deviation of gain between each amplifier is <±0.8 dB. As the gain of each amplifier is only ∼30 dB, to reach its maximum power level, we added a 20-dB small amplifier to pre-amplify the LLRF signal of the direct digital synthesizer (DDS). The largest distortion of the sine wave comes from the third- order harmonics, whose level is ∼-23 dBc in the work frequency band.

Figure 7:Full-screen View

(Color online) Block diagram of the RF system.

2.5 LLRF control system

Fig. 8 shows the block diagram of the LLRF control system. As can be seen, the programmed data of amplitude, frequency, and phase of the RF signal are transferred from the central control system via Ethernet to the local memory of the LLRF control system before the operation of the synchrotron. The programmed data are then processed by a feedback control algorithm and then amplified and transmitted to the RF cavity. The amplitude of the output RF signal obtains feedback according to the measured voltage of the RF cavity. A beam position monitor (BPM) is used to detect the radial beam orbit displacement Δ R, and the system uses this signal for frequency feedback compensation. An fast current transformer (FCT) is used to detect the synchrotron phase of the bunched beam. The system then compares the synchrotron phase to the setting phase of the beam, Δ ϕ, and makes an RF phase compensation. The maximum delay of the Δ ϕ feedback is <10 μ s, which is much smaller than the period of synchrotron oscillation (∼1 ms).

Figure 8:Full-screen View

(Color online) Block diagram of the LLRF control system.

We use one field-p rogrammable gate array (FPGA) and two DSPs for high-speed digital signal processing. The proportional-integral-derivative (PID) control algorithm and feedback control algorithm are implemented in the FPGA. The digital signal processor (DSP) is used to assist in data processing, downloading, and uploading. Two 16-MB synchronous dynamic random-access memory chips are installed on the board to serve as the local memory of the LLRF control system.