1. Introduction
Magetoresistive random-access memory (MRAM) is a new nonvolatile memory technology that promises unlimited endurance and faster writing speeds compared to other memory technologies currently available in the market. Hence, MRAM has received considerable attention for commercial and military applications. MRAM uses a magnetic tunnel junction (MTJ) for data storage. Figure 1 shows the structure of an MRAM cell. The MTJ is formed from two ferromagnetic plates—a magnetic free layer, and a magnetic pinned layer—each of which holds a magnetic field. A tunnel barrier separates the two plates by a thin oxide layer. A bit line pass above the MTJ, while write lines run below the MTJ. The magnetic pinned layer is a permanent magnet that is set to a fixed polarity; the magnetic field in the magnetic free layer is influenced by the write and bit lines. The orientation of the magnetic field can be changed by the direction of current in the bit line. If both plates have the same polarity, the resistance of MTJ is low due to the magnetic tunneling effect, and the MTJ is considered to store a "1". When the plates are at opposite polarity, the resistance is high, thus the MTJ stores a "0".
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MTJ is written by magnetic fields; in other words, the MRAM is easily affected by strong magnetic fields. Strong magnetic fields from various astronomical bodies in space, solar flares, and the magnetic torque of spacecrafts would affect the reliability of MRAM devices. Table 1 lists some values of magnetic field strengths found in the universe[1]. At the same time, electrons and protons in the Van Allen belt add to the total ionizing dose (TID) on MRAM devices in space. MRAM is influenced by synergistic effects, which blend the total ionizing dose with the magnetic field in real outer space environments.
Position | Magnetic field (G) |
---|---|
Galaxy magnetic field | 10−5 |
Earth magnetic field | ~5×10−2 |
Solar magnetic field | ~5×10 |
Magnetic torque in a spacecraft | ~4×102 |
Solar flares | ~5×103 |
Neutron star | 1011 |
Radiation damage on MRAM has been investigated since the first MRAM application was proposed. Radiation effects, as well as the mechanisms surrounding TID[2-7], single event latchup (SEL)[2-4], single event upset (SEU)[3,5,8-11], single event transient (SET) [9], and single event functional interrupt (SEFI)[9]have been tested, and analyzed, however, the synergistic effects of radiation, and magnetic fields combined have not yet been considered. The purpose of this work is to analyze synergistic effects, and whether that decreases, or enhances the radiation damage on MRAM.
2. Experimental description and result
MR25H10 (Everspin) memory is used. The MRAM is organized as 131027×8 bits, with its SPI (serial peripheral interface) interface having up to 40 MHz clock rate.
The TID test was done at the Xinjiang Technical Institute of Physics and Chemistry, Chinese Academy of Sciences, using a 60Co γ-radiation source, and an electron beam from an accelerator. The dose rates of the two radiation sources were very close: 0.78 Gy(Si)/s for the 60Co γ source, and 0.75 Gy(Si)/s for the electron beam, which were selected according to the MIL-STD-883J method 1019.9; 0.75 Gy(Si)/s was the closest to its suggested dose of 0.5 Gy(Si)/s. For the TID test, the MRAM was in static test mode, and all inputs were set at a fixed bias of 3.3 V. The test of synergistic effects was performed similarly, with the only difference being the addition of a magnetic field on the MRAM. The magnetic field was generated by a bulk iron nickel permanent magnet behind the MRAM. The magnetic intensity was tested by a handheld Gauss meter on the MRAM surface, which measured about 250 G of horizontally, and 150 G vertically. It was ensured that all memories were functioning properly under that magnetic intensity. Electrical parameters were tested with Digital chip testing system Data from the following parameters were recorded between radiation levels: standby current, ISB; write operation current, IDDW; read operation current, IDDR; highest output voltage, VOH; lowest voltage, VOL; input leakage current, ILI; output leakage current, ILO; SCK (serial clock) high time, tWH; the number of errors; and functional tests. The sequence of the functional tests was, read "55", write "00", read "00", write "FF", read "FF", write "55", read "55".
Tests of TID, and synergistic effects exhibited reading errors at 400 Gy(Si) for various radiation sources. However, the number of errors when reading the first "55" was different (see Table 2); more read errors were observed for TID than due to synergistic effects. All memories restore functional within 24 hours at room temperature annealing.
Numbers of errors | 60Co γ source | Electron beam |
---|---|---|
TID | 23840 | 101099 |
Synergistic effect | 73 | 8864 |
The radiation sensitive parameters were ISB, IDDW, and IDDR. Figures 2 and 3 show the variation of current with the accumulated dose, and with annealing time for the two radiation sources. Regardless of the radiation source, the current values increased with dose, reaching a maximal value, before falling due to functional failure; however, TID exhibited larger current values than those with synergistic effects at 400 Gy(Si).
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3. Discussion
Because MTJ has good radiation toleration, it could work well under irradiation[12-14]. However, the performance of CMOS peripheral control circuits deteriorated due to irradiation, and therefore, the function of memory failed immediately. Radiation introduced a large number of oxide trapped charges, leading to shallow trench isolation (STI)-induced leakage [15,16], which was the primary reason for the deterioration. Therefore, the functional failure of MRAM resulted from CMOS peripheral control circuit rather than the MTJ. The MRAM then began to restore function after the oxide trapped charges were annealed out.
Figures 2 and 3 illustrate the change in current against TID at different radiation sources. The rise in current was not only due to STI leakage, but also MTJ leakage. Schottky emission was a dominant part of MTJ leakage before radiation, where the current density,
where,
Denoting the barrier reduction by
The function of MRAM failed at 400 Gy(Si) to TID, and synergistic effects, however other parameters, such as current, and the number of errors prove that the radiation damage of synergistic effects was less than that of TID. An experiment with a vertically oriented magnetic field would explain that phenomenon. With TID, the electrons are ejected from ionizing particles, and swept by the electric field fast out of the oxide layer. On the other hand, the holes are less mobile, and are, therefore, trapped, leading to the creation of oxide trapped charges. With synergistic effects, both magnetic, and electric fields are applied simultaneously, hence, all electrons cannot be swept out of the oxide immediately. Rather, they move along a curved path because electric field is perpendicular to the vertically oriented magnetic field at same time, as shown in Figure 4. The net effect is that these electrons had an average "drift" in the direction of E×B[20]; Figure 5 shows the drift motion in the oxide layer. The electrons which drift through the oxide recombine with holes, decreasing the number of holes transformed to oxide trapped charges. As a result, STI leakage, and Frenkel–Poole emission were smaller than that of TID, therefore exhibiting lower parameter degeneration.
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4. Conclusion
The function of MRAM failed at 400 Gy(Si) with TID, and synergistic effects tests under two different radiation sources. The reason of the functional failure was STI leakage, leading to the deterioration of CMOS peripheral control circuitry. ISB, IDDR, and IDDW varied in the test, so these parameters were regarded as the radiation-sensitive parameters that validated that the radiation damage of synergistic effects is less than that of TID, as the additional magnetic field cause electrons to drift in the oxide, and recombine with holes, resulting in lesser oxide trapped charges of synergistic effect than with TID. A hardening technique to tolerate TID is required to be integrated onto the silicon-on-insulator (SOI) CMOS supporting circuitry in the future.
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