Topology of pulsed power supply

The typical topology of a non-isolated switching-pulsed power supply is shown in Fig. 1, which consists of a front-end voltage source Vdc, DC-link capacitors C, IGBT modules S1-S4, and a resistance-inductance load R-L. The front voltage source provided a DC voltage that satisfied the power and voltage ripple requirements of the rear stage. In low-power situations, many programmable DC power supply products are used as the front voltage source with single-phase rectifier circuits; in medium- or high-power applications, commonly used circuits include three-phase uncontrolled rectifiers, three-phase bridge thyristor rectifiers, and three-phase PWM rectifiers. H-bridge choppers are divided into types A, D, and E, corresponding to the one-, two-, and four-quadrant operating modes, respectively [25]. This article discusses a D-type chopper with a positive load current and positive or negative load voltage. In the descending section of the pulsed current, the load voltage may be negative owing to the load inductance. In this figure, ic denotes the capacitor current, i₁ is the output current of the front-end voltage source, and i₂ is the input current of the H-bridge.

Fig. 1Full-screen View

The typical H-bridge topology of non-isolated switching pulsed power supply for accelerator

The DC-link capacitor current ic is obtained as $\begin{array}{l}{i}_{\text{c}}=i_2-i_1\hfill \end{array},$ (1) i₁ and i₂ can be decomposed into DC and AC components as follows: $\begin{array}{l}{i}_1=I_{\text{1,avg}}-i_{\text{1,ac}}\mathrm{,}{i}_2=I_{\text{2,avg}}-i_{\text{2,ac}}\hfill \end{array},$ (2) where I_1,avg and I_2,avg denote the DC components of i₁ and i₂, respectively; i_1,ac and i_2,ac represent the AC components of i₁ and i₂, respectively. The capacitor ripple current is defined as the AC current flowing through a capacitor. Therefore, instead of Eq. (1), i_c is expressed as follows: $\begin{array}{l}{i}_{\text{c}}=i_{\text{2,ac}}-i_{\text{1,ac}}\hfill \end{array}.$ (3) The RMS value of the capacitor current I_c,rms can be obtained from [16]: $\begin{array}{l}{I}_{\text{c,rms}}^2=I_{\text{1,ac,rms}}^2+I_{\text{2,ac,rms}}^2\hfill \end{array},$ (4) where I_1,ac,rms and I_2,ac,rms are the RMS values of the i₁ and i₂ AC components, respectively. The capacitor RMS current is composed of the output current of the front-end voltage source and the current component caused by the H bridge. When the front-end is a voltage source, I_1,ac,rms can be ignored, and only the current caused by the H-bridge can be calculated, I_c,rms = I_2,ac,rms, Eq. (4) can be simplified as follows: $\begin{array}{l}{I}_{\text{c,rms}}^2=I_{\text{2,ac,rms}}^2=I_{\text{rms}}^2-I_{\text{avg}}^2\hfill \end{array},$ (5) where I_rms denotes the DC-link RMS current and I_avg represents the DC-link average current.

Calculation of DC-link capacitor RMS current

The reference current patterns are shown in Fig. 2, where the pulsed current has two DC regions at 10 A and 300 A, flat top and flat bottom, which are used for beam injection and extraction, respectively. The reference current increases from 0 to the flat-bottom value, increases to the flat-top value, and then decreases to 0 with different slopes. The parameters of the current waveform are listed as: the rising time and falling time are 0.128 s, the flat top current is 300 A or 500 A, the flat bottom current is 10 A, the flat top time and the flat bottom time are 10 ms and 2 ms respectively, and the current period is 0.396 s. The pulsed power supply repeatedly outputs current.

Fig. 2Full-screen View

Reference current pattern

The load voltage of a pulsed power supply is related to the load parameters, current value, and current rate of increase. Based on the characteristics of the resistive load, the load voltage V_load can be described as [26] $\begin{array}{l}{V}_{\text{load}}=L\frac{\text{d}{I}_{\text{ref}}}{\text{d}t}+I_{\text{ref}}R\mathrm{,}\hfill \end{array}$ (6) where I_ref denotes the reference current and dI_ref/dt represents the slope of the reference current pattern, R and L represent resistance and inductance, respectively. The H-bridge operates in the double-frequency chopping mode, and the IGBT duty ratio D can be expressed as $\begin{array}{l}D=\frac{\frac{V_{\text{load}}}{V_{\text{dc}}}+1}{2}\mathrm{,}\hfill \end{array}$ (7) where V_dc denotes the DC-link voltage. When the power supply is working, switches S1 and S4 and the freewheeling diodes work in parallel with them. The power supply outputs pulsed or direct current. When the duty ratio of IGBT is greater than 50%, switches S1 and S4 have a common conduction time, in which the energy flows to the magnet load from the front stage with frequency doubling and chopping; when the duty ratio of IGBT is less than 50%, there is no time for S1 and S4 to conduct together, and the energy is fed back from the load to the front stage. The output duty ratio D_o is defined as $\begin{array}{l}{D}_{\text{o}}=\frac{V_{\text{load}}}{V_{\text{dc}}}\mathrm{.}\hfill \end{array}$ (8) The output duty ratio is analyzed in the following section. During the switching cycle, the power supply switched between different states. Figure 3 presents the four operating states. State a indicates that the energy flows from the front stage to the magnet, states b and c are in a freewheeling state, and state d indicates that the energy of the magnet is fed back to the front stage. When V_load >0, i.e. D_o >0, the operating state is switched between the states a, b, and c, and When V_load >0, i.e. D_o >0, the working state is switched between the states d, b, and c.

Fig. 3Full-screen View

The operation status of the H-bridge topology

To analyze the current in the circuit under different operating conditions, assuming that the initial voltage of the capacitor is M and the initial current of the inductor is N, and based on the Laplace transform, some circuit equations are listed to solve the inductor current under state a. The inductor current i_L and input current of the H-bridge i₂ can be obtained as $\begin{array}{c}{i}_{\text{L}}\left(t\right)={\mathcal{L}}^{-1}\left[\frac{N}{\left(s+R/L\right)}+\frac{V_{\text{dc}}/L}{s\left(s+R/L\right)}\right]\\ =N\cdot e^{-\frac{R}{L}t}+\frac{V_{\text{dc}}}{R}\left(1-e^{-\frac{R}{L}t}\right)\\ i_2\left(t\right)=i_{\text{L}}\left(t\right)\end{array}$ (9) iL and i₂ in states b and c are expressed as $\begin{array}{l}{i}_{\text{L}}\left(t\right)={\mathcal{L}}^{-1}\left[\frac{N}{\left(s+R/L\right)}\right]=N\cdot e^{-\frac{R}{L}t}\\ i_2\left(t\right)=0\end{array}$ (10) i_L and i₂ under state d are given by $\begin{array}{c}{i}_{\text{L}}\left(t\right)={\mathcal{L}}^{-1}\left[\frac{N}{\left(s+R/L\right)}-\frac{V_{\text{dc}}/L}{s\left(s+R/L\right)}\right]\\ =N\cdot e^{-\frac{R}{L}t}-\frac{V_{\text{dc}}}{R}\left(1-e^{-\frac{R}{L}t}\right)\\ i_2\left(t\right)=-i_{\text{L}}\left(t\right)\end{array}$ (11) In summary, the expression for the input current of the H-bridge i₂ is: $\begin{array}{cc}{i}_2\left(t\right)=\{\begin{array}{ll}N\cdot e^{-\frac{R}{L}t}+\frac{V_{\text{dc}}}{R}\left(1-e^{-\frac{R}{L}t}\right)\mathrm{,}\hfill & 0<t<D_{0}T;\hfill \\ \mathrm{0,}\hfill & D_{0}T<t<T;\hfill \end{array}& D_0\left(t\right)>0;\\ i_2\left(t\right)=\{\begin{array}{ll}-N\cdot e^{-\frac{R}{L}t}+\frac{V_{\text{dc}}}{R}\left(1-e^{-\frac{R}{L}t}\right)\mathrm{,}\hfill & 0<t<\left|D_{0}T\right|;\hfill \\ \mathrm{0,}\hfill & \left|D_{0}T\right|<t<T;\hfill \end{array}& D_0\left(t\right)<0;\end{array}$ (12) where T is the period after frequency doubling, which is equal to 1/2f_s, f_s denotes the switching frequency. The DC-link RMS current I_rms and DC-link average current I_avg are given by $\begin{array}{l}\{\begin{array}{l}{I}_{\text{rms}}=\sqrt{\frac{1}{T}{\displaystyle {\int }_0^T}{\left(i_2\right)}^2\text{d}t}\hfill \\ I_{\text{avg}}=\frac{1}{T}{\displaystyle {\int }_0^T}{i}_2\text{d}t\hfill \end{array}\hfill \end{array}$ (13) Combining Eq. (5), the capacitor RMS current I_c,rms is obtained as follows: $\begin{array}{l}{I}_{\text{c,rms}}=\sqrt{I_{\text{rms}}^2-I_{\text{avg}}^2}\hfill \end{array}.$ (14)

Capacitor current reconstruction

In practical pulsed power supply applications, capacitors are usually connected through stacked busbars, making it difficult to measure the current flowing through a DC-link capacitor using a current sensor. If a current sensor is installed, it damages the main circuit structure. To solve this problem, this study proposes a capacitor ripple current reconstruction method for pulsed power supplies.

The accelerator power supply requires minimal voltage ripple and extremely high current accuracy, LC filters are also added to the chopper output stage. By designing the filter and increasing the switching frequency, the output current index can be further improved and ultimately meet the requirements of the accelerator power supply outputs. A schematic of the pulsed power supply is shown in Fig. 4, where L_f and C_f represent the filter inductance and capacitance, respectively, which reduce the voltage and current ripples, i_o and V_o are the current and voltage at the bridge output point, respectively.

Fig. 4Full-screen View

The Schematic diagram of power supply

i_c is determined using i₁ and i₂. i₁ can be measured using current sensors. i₂ cannot be measured because of the practical connections of the stacked busbar. When the H-bridge is in state a, i₂ is equal to i_o; When the H-bridge is in states b and c, i₂ equals zero; and When the H-bridge is in state d, i₂ equals -i_o. Therefore, i₂ is reconstructed using i_o.

In addition, the H-bridge states can be reflected by V_o, where V_o is equal to V_dc in state a, V_o is equal to 0 in states b and c, V_o is equal to V_dc in state d.

Due to i_c=i₂-i₁, i_c can be reconstructed. Table 1 presents the principles of capacitor ripple current reconstruction. The capacitor current can be reconstructed based on these principles.

Thermal model of capacitor

An equivalent model of an aluminum electrolytic capacitor is shown in Fig. 5, where ESR denotes the equivalent series resistance, L is the equivalent series inductance, and C is the capacitance. The impedance Z_c of the capacitor is expressed as follows [19]: $\begin{array}{l}{Z}_{\text{c}}=\text{ESR}+j2\pi fL+\frac{1}{2\pi fC}\mathrm{,}\hfill \end{array}$ (15) where f denotes the frequency. This indicates that the impedance is dominated by capacitance C in the low-frequency range, ESR in the mid-frequency range, and L in the high-frequency range. ESR varies with frequency. The thermal characteristics of a capacitor can be modeled using a thermal network, as shown in Fig. 5, where R_thhc is the thermal resistance from the hotspot to the case, R_thca is the thermal resistance from the case to the ambient environment, and R_th is the total thermal resistance, R_th = R_thhc + R_thca. T_h, T_c, and T_a are the hotspot, case, and ambient temperatures, respectively [27]. During operation, the capacitor current I_rms causes a power loss owing to the equivalent series resistance.

Fig. 5Full-screen View

The electrical and thermal models of aluminum electrolytic capacitor

The heat in a capacitor is mainly generated by power loss, which is closely related to the ESR and ripple current. The capacitor current varied with the operating conditions of the power supply. The frequency spectrum of the capacitor ripple current was analyzed using FFT combined with ESR at different frequencies, and the power loss P_c,loss can be expressed as [19] $\begin{array}{l}{P}_{\text{c,loss}}={\displaystyle \sum _{i=1}^n\text{ESR}}\left(f_i\right)\times I_{\text{rms}}^2\left(f_i\right),\hfill \end{array}$ (16) where ESR(f_i) is the ESR of the capacitor at frequency fi; I_rms(f_i) is the RMS value of the capacitor ripple current at frequency fi; and n is the number of frequency components.

An aluminum electrolytic capacitor (CECTN, FE50400103M5D5D1) was tested as the research subjects. The size of the capacitor is 91 mm×130 mm (diameter×height); the rated voltage and capacitance is 400 V,10000 μF; the ESR is 12 mΩ (20 ℃, 120 Hz). The thermal resistance R_th provided by the manufacturer was 2.75 K/W. Since the ESR varies with frequency, the capacitor manufactures normally specify a term called “Ripple Current Coefficient" Ffi and is expressed as: $\begin{array}{l}{F}_{fi}=\sqrt{\frac{\text{ESR}\left(f_0\right)}{\text{ESR}\left(f_i\right)}}\mathrm{,}\hfill \end{array}$ (17) where f₀ is the rated frequency, usually at 120 Hz, ESR(f₀) is the ESR of the capacitor at 120 Hz, ESR(f₀)=12 mΩ. Table 2 lists the Ffi values for the capacitor ESR characteristics.

Combining Eq. (16), and Eq. (17), the power loss P_c,loss is given by $\begin{array}{l}{P}_{\text{c,loss}}={\displaystyle \sum _{i=1}^n{I}_{\text{rms}}^2}\left(f_i\right)\times \frac{1}{F_{fi}^2}\times \text{ESR}\left(f_0\right)\hfill \end{array}.$ (18) The temperature increase ΔT at the center of the capacitor is given by $\begin{array}{l}\text{Δ}T=P_{\text{c,loss}}\times R_{\text{th}}\hfill \end{array}.$ (19) The hotspot temperature of DC-link capacitor T_h is obtained as follows: $\begin{array}{l}{T}_{\text{h}}=T_{\text{a}}+\text{Δ}T\mathrm{,}\hfill \end{array}$ (20) where T_a represents the ambient temperature.

Considering the P_c,loss calculation under the condition of 0.05 F capatiance and a pulsed current of 500 A as an example, Table 3 lists the P_c,loss solution process. The data for fi and I_rms(f_i) are presented in Figs. 9(c), which were obtained through FFT of the capacitor current. We consider the frequencies, including low frequency 2.5 Hz, switching frequency 2, 4, 6, ..., and 16 times. An important harmonic current component of the capacitor, 2.5 Hz, is the frequency of the pulsed current. In the relationship between ESR and frequency, the frequency belongs to the area of extremely low frequency, and the ESR at 2.5 Hz was obtained by fitting. The ripple current correction coefficient parameter at 2.5 Hz was 0.32. In the hotspot temperature calculation for the capacitor, the maximum contribution was the RMS current at 2.5 Hz. The power loss P_c,loss was 13.24 W, and the estimated temperature increase ΔT was 36.4 ℃.

Verification of DC-link capacitor RMS current

This section presents the analytical calculation of the capacitor RMS current in Sect. 2. The RMS value of the capacitor current can be obtained by calculating the RMS value of the AC component i₂. According to Eq. (9) into Eq. (11), the waveform of i₂ can be analytically calculated. In addition, the waveform of i₂ can be obtained by establishing a simulation model using a simulation software. The capacitor current waveform i_cap could also be measured on the experimental platform.

Figure 7 shows the simulation, experiment, and analytical calculation of a single-capacitor current waveform at a pulsed current of 300 A and a DC-link capacitiance of 0.09 F. The simulation waveform is the waveform of i₂ obtained using the simulation model. The experimental waveform is the waveform of the AC component of the capacitor current measured by the current probe, and the waveform of the proposed method is the waveform of i₂ obtained by analytical calculation. The analytical calculation results for the capacitor current are consistent with the experimental results. The DC component of i₂ in the simulation was I_2,avg=0.8786 A. and the DC component of i₂ for the analytical calculations is I_2,avg=0.8979 A. The two i₂ values are shown in Fig. 7. DC-link capacitors are discharged during the rapid rise in current and charged in the rapidly falling section of the current.

Fig. 7Full-screen View

(Color online) Experiment, simulation, and analytical calculation waveform of a capacitor

From these three current waveforms, we obtained the current RMS values. Table 5 lists the RMS values of the capacitor currents obtained from the experiment, simulation, and the proposed method under different DC-link capacitances and pulsed currents. The proposed method values represent the RMS value of the AC component of i₂ obtained by the analytical calculation, that is, I_c,rms=I_2,ac,rms, the simulation values are the RMS values of the AC component of i₂ obtained by simulation, and the experimental values are the RMS values of the AC components of the measured capacitor current. The errors in the experimental results were within 1.41 A, proving that the proposed method is effective and accurate.

Experimental verification of the hot spot temperature

Figure 8 shows the measured capacitor current and voltage waveforms for different pulsed currents and numbers of DC-link capacitors. According to the experimental results, in the current rising stage from the flat base to the flat top, DC-link capacitors discharge and provide energy to raise the load current; and in the current falling stage from the flat-top to the 0-value, the capacitor is charged to store the energy feedback from the load.

Fig. 8Full-screen View

(Color online) Measured capacitor current and voltage waveform. (a) 9-Caps, 500 A pulsed current; (b) 9-Caps, 300 A pulsed current; (c) 5-Caps, 500 A pulsed current; (d) 5-Caps, 300 A pulsed current

Figure 9 shows FFT plots of the capacitor ripple current. The frequency spectrum plots show that the harmonic component is concentrated at two, four, and six times the switching frequency, consistent with frequency-doubling chopping. The larger the output pulsed current and the fewer the capacitors connected in parallel, the higher the RMS harmonic component of the capacitor current.

The curves of the hotspot and ambient temperatures of the Al-Cap under different conditions are shown in Fig. 10. An increase in the capacitor ripple current increases the capacitor temperature. The hotspot temperature stabilized after 6 h of operation, and the average temperature of the last 100 s was adopted as the experimental result to eliminate errors caused by fluctuations. The temperature rise results under different conditions are shown in Table 6. At a capacitance of 0.09 F, the maximum error value of the capacitor temperature rise was ±0.4 ℃, and at a capacitance of 0.05 F, the maximum error value was ±1.5 ℃. This proves that the method can effectively evaluate the hotspot temperature and temperature rise of DC-link capacitors. The temperature rise results calculated using the reconstructed and measured capacitor currents were consistent, indicating that the reconstructed current can be used to calculate the temperature rise efficiently.

Fig. 9Full-screen View

FFT plots of capacitor current. (a) 9-Caps, 500 A pulsed current; (b) 9-Caps, 300 A pulsed current; (c) 5-Caps, 500 A pulsed current; (d) 5-Caps, 300 A pulsed current

Fig. 10Full-screen View

(Color online) Measured hot spot temperature. (a) 9-Caps, 500 A pulsed current; (b) 9-Caps, 300 A pulsed current; (c) 5-Caps, 500 A pulsed current; (d) 5-Caps, 300 A pulsed current

In addition, the number of capacitors decreased from nine to five, and the experimental temperature rise at the 500 A current increased from 13.1 ℃ to 34.9 ℃, which shows that reducing the capacitance by half will result in a significant increase in the hotspot temperature.

Monte Carlo Analysis and lifetime prediction

A block diagram of the lifetime evaluation of a DC-link capacitor is shown in Fig. 11, which consists of two parts. The first part comprises an analysis of electric and thermal stresses. Based on the different pulsed currents, the current stress of the DC-link capacitor was obtained and used as the input for the power loss model. The hotspot temperatures were calculated using a thermal model. The second part involved a Monte Carlo simulation and lifetime prediction considering parameter fluctuations.

Fig. 11Full-screen View

Block diagram of DC-link capacitor lifetime evaluation

For aluminum electrolytic and film capacitors, the lifetime model is expressed as follows [11]: $\begin{array}{l}L=L_0\times {\left(\frac{V}{V_0}\right)}^{-p_1}\times 2^{\frac{T_0-T_{\text{h}}}{p_2}}\mathrm{,}\hfill \end{array}$ (21) where L₀ is the rated lifetime under the rated temperature T₀ and rated voltage V₀, L is the actual lifetime under the operating voltage V and operating hotspot temperature T_h. The values of p₁ vary from 3 to 5, and p₂ = 10.

Owing to the differences in the actual capacitor manufacturing process, the lifetime calculated using a fixed-capacitor lifetime model has a large error. To solve this problem, Monte Carlo simulations are typically used to investigate the reliability of DC-link capacitors by considering the relevant parameter variations. This section considers two types of uncertainty [22]: 1) parameter uncertainty in applied lifetime models. The uncertainty of the fitting coefficient p₂ is considered; 2) parameter uncertainty between capacitors of the same product part number is considered. The difference between T₀ and Th was considered. All parameters in the analysis were modeled using a normal probability distribution function. We assume that there is a 5% change in p₂, L₀, and T_h, with a confidence level of 90%. The specific parameters of the normal distribution are as follows: $\begin{array}{l}\mu ={\mu }_{\text{test}}\mathrm{,}\sigma =\mu \times 5\%/z\mathrm{,}\hfill \end{array}$ (22) where μ_test is a fixed value for this parameter with a confidence level of 90% and z = 1.65.

When each parameter follows a normal distribution, the calculated capacitor lifetime also follows a normal distribution. To express the reliability of the capacitor more intuitively, the B1 lifetime is typically used, that is, the capacitor’s lifetime when the capacitor’s cumulative failure rate is 1% [28]. Table 7 lists the hotspot temperature results for all capacitors under different experimental conditions. The DC-link capacitors have different temperature distributions.

Figure 12(a), (b), (c), and (d) depict the B1 lifetime of capacitors under the condition of 300 A or 500 A pulsed current and 0.09 F or 0.05 F DC-link capacitance, respectively. The B1 lifetimes calculated from the estimated T_hest1 and T_hest2 values are also listed. Under the conditions of 300 A and 0.05 F, the B1 lifetimes of the five capacitors were 392, 411, 421, 460, and 489 days, respectively. When the number of DC-link capacitors was increased from five to nine, the lifetimes were 2.37 years, 2.43 years, 3.47 years, 2.50 years, 2.50 years, 2.54 years, 2.57 years, 2.62 years, and 2.66 years, respectively. Under the conditions of 500 A and 0.05 F, the B1 lifetimes of the five capacitors were 39, 42, 48, 56, and 60 days, respectively. When the number of capacitors is increased from 5 to 9, the lifetimes are 1.35 years, 1.40 years, 1.43 years, 1.46 years, 1.47 years, 1.55 years, 1.56 years, 1.56 years, and 1.68 years, respectively. It can be observed that connecting more capacitors in parallel can improve the lifetime of DC-link capacitors, and an imbalance of temperature in the capacitors can also lead to an imbalance in the lifetime.

Fig. 12Full-screen View

(Color online) B1 Lifetime of DC-link capacitor under different conditions. (a) 9-Caps, 500 A pulsed current; (b) 9-Caps, 300 A pulsed current; (c) 5-Caps, 500 A pulsed current; (d) 5-Caps, 300 A pulsed current

Analysis and discussion

The hotspot temperature is a critical factor in the lifetime prediction scheme. The lifetime prediction of electrolytic capacitors in a pulsed power supply is limited to electrothermal stresses, and this study did not consider the failure mechanism in terms of humidity. Accelerated testing of capacitors can be implemented under real operating conditions to obtain more accurate life-assessment results.

For small- and medium-power pulsed power supplies, such as quadrupole magnet power supplies and sextupole magnet power supplies, aluminum electrolytic capacitors are widely used as DC-link capacitors, whereas for high-pulsed power supplies, such as dipole magnet power supplies, film capacitors may be required [29]. Although this study focuses on aluminum electrolytic capacitors, the method applies to film capacitors. Film capacitors have a lower temperature increase than aluminum electrolytic capacitors owing to their low ESR over the entire frequency range. Film capacitors have the advantages of a long lifetime, high withstand voltage, high current tolerance, ability to withstand back pressure, high reliability, etc., and are expensive.

This study contributes to the design and maintenance of pulsed power supplies. During the design stage, the results of the capacitor lifetime assessment guide the design. During operation, devices that may fail can be replaced promptly to reduce maintenance costs.