Gamma Ray Array Detector (GRAD) is one of external target facility subsystems in the Cooling Storage Ring on the Heavy Ion Research Facility at Lanzhou (HIRFL-CSR). The trigger subsystem of GRAD is required to make a fast L1 trigger decision with a fixed latency for the data acquisition. Because the hit signals from the detector are asynchronous with the local clock of the trigger system, a nondeterministic latency (the value changes between zero and one clock period) is generated when the synchronous receivers of the conventional trigger system process the hit signals. In this paper, an improved trigger logic based on a field-programmable gate array is developed, and comprised of zero-delay broadening circuits as receivers and an improved adding circuit designed for the new receivers. Software simulation and experimental measurement have been conducted. Comparison with the conventional trigger logic, the improved trigger logic has the advantage of eliminating the nondeterministic latency and reducing the total processing latency.