Ze He; Shi-Wei Zhao; Tian-Qi Liu; Chang Cai; Xiao-Yu Yan; Shuai Gao; Yu-Zhu Liu; Jie Liu

doi:10.1007/s41365-021-00979-8

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Verification of SEU resistance in 65 nm high-performance SRAM with dual DICE interleaving and EDAC mitigation strategies

NUCLEAR ELECTRONICS AND INSTRUMENTATION | 更新时间：2022-01-14

- Verification of SEU resistance in 65 nm high-performance SRAM with dual DICE interleaving and EDAC mitigation strategies 封面论文增强出版
- Verification of SEU resistance in 65 nm high-performance SRAM with dual DICE interleaving and EDAC mitigation strategies
- Nuclear Science and Techniques 2021年 32卷第12期 (2021)
- 作者机构：
  
  Institute of Modern Physics, Chinese Academy of Sciences,Lanzhou,China,730000;Department of Computer Science and Technology, Tsinghua University,Beijing,China,100084;School of Nuclear Science and Technology, University of Chinese Academy of Sciences,Beijing,China,100049
- 作者简介：
- 基金信息：
  
  National Natural Science Foundation of China(12035019;11690041;11805244)
- DOI：10.1007/s41365-021-00979-8 中图分类号：
- 纸质出版日期：2021-12，
  
  网络出版日期：2021-12-13，
  
  收稿日期：2021-07-01，
  
  修回日期：2021-10-30，
  
  录用日期：2021-11-01
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引用本文
Ze He, Shi-Wei Zhao, Tian-Qi Liu, 等. Verification of SEU resistance in 65 nm high-performance SRAM with dual DICE interleaving and EDAC mitigation strategies[J]. Nuclear Science and Techniques, 2021, 32(12):139

Ze He, Shi-Wei Zhao, Tian-Qi Liu, et al. Verification of SEU resistance in 65 nm high-performance SRAM with dual DICE interleaving and EDAC mitigation strategies[J]. Nuclear Science and Techniques, 2021, 32(12):139
Ze He, Shi-Wei Zhao, Tian-Qi Liu, 等. Verification of SEU resistance in 65 nm high-performance SRAM with dual DICE interleaving and EDAC mitigation strategies[J]. Nuclear Science and Techniques, 2021, 32(12):139 DOI： 10.1007/s41365-021-00979-8.

Ze He, Shi-Wei Zhao, Tian-Qi Liu, et al. Verification of SEU resistance in 65 nm high-performance SRAM with dual DICE interleaving and EDAC mitigation strategies[J]. Nuclear Science and Techniques, 2021, 32(12):139 DOI： 10.1007/s41365-021-00979-8.

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Verification of SEU resistance in 65 nm high-performance SRAM with dual DICE interleaving and EDAC mitigation strategies 封面论文 增强出版

Verification of SEU resistance in 65 nm high-performance SRAM with dual DICE interleaving and EDAC mitigation strategies 封面论文增强出版