A digitalizing board for the prototype array of LHAASO WCDA

A digitalizing board for the prototype array of LHAASO WCDA 1 2 first-author 1 2 1 2 1 2 corresp Corresponding author. E-mail address: anqi@ustc.edu.cn Corresponding author. E-mail address: anqi@ustc.edu.cn anqi@ustc.edu.cn State Key Laboratory of Particle Detection & Electronics, Hefei 230026, China State Key Laboratory of Particle Detection & Electronics, Hefei 230026, China Anhui Key Laboratory of Physical Electronics, Department of Modern Physics, University of Science and technology of China, Hefei 230026, China Anhui Key Laboratory of Physical Electronics, Department of Modern Physics, University of Science and technology of China, Hefei 230026, China In this paper, a digitalizing board for readout of PMT signals in the prototype array of WCDA (water Cerenkov detector array) for LHAASO (Large high altitude air shower observatory) is designed. The prototype array is composed of 9 PMTs, including the pulse time and charge measurement from the PMTs, and clock generation and trigger decision. In the digitalizing board, FPGA reconfiguration and data readout via VME bus are implemented. Test results show that the performances meet well with the requirements of readout electronics. It has been installed in Yangbajing and tests with the prototype array and DAQ is ongoing. PMT Time measurement Charge measurement FPGA reconfiguration VME bus References CAO Z . A future project at Tibet: the large high altitude air shower observatory (LHAASO) , 31st International Cosmic Ray Conference proceeding , 2009 . A future project at Tibet: the large high altitude air shower observatory (LHAASO) He H H . LHAASO project: detector design and prototype , 31st International Cosmic Ray Conference proceeding , 2009 . LHAASO project: detector design and prototype Song J , An Q , Liu S B . IEEE Trans Nucl Sci , 2006 , 53 : 236 - 241 . IEEE Trans Nucl Sci Wang J H , Liu S B , Shen Q , et al . IEEE Trans Nucl Sci , 2010 , 57 : 446 - 450 . IEEE Trans Nucl Sci Lin M C , Tsai G R , Liu C Y , et al . FPGA-Based High Area Efficient Time-To-Digital IP Design . IEEE Tencon , 2006 , 14 - 17 . FPGA-Based High Area Efficient Time-To-Digital IP Design Virtex-4 FPGA Data Sheet: DC and Switching Characteristics, DS302 (V3.7) , 2009 , 37 - 39 , Xilinx Inc . Virtex-4 FPGA Data Sheet: DC and Switching Characteristics, DS302 (V3.7) Virtex-4 FPGA User Guide, UG070 (V2.5) , 2008 , 55 - 57 , Xilinx Inc . Virtex-4 FPGA User Guide, UG070 (V2.5) M12+ GPS Receiver User’s Guide , 2004 , P 21 , Motorola, Inc . M12+ GPS Receiver User’s Guide Li Q J , Wang Z , Chang J F , et al . IEEE Nucl Sci Symp Conf Rec , 2009 , N25−240 . IEEE Nucl Sci Symp Conf Rec Virtex-4 FPGA Configuration User Guide, UG071 (V1.11) , 2009 , 27 - 30 , Xilinx Inc . Virtex-4 FPGA Configuration User Guide, UG071 (V1.11) Wu J Y , Sten H , Shi Z H . IEEE Nucl Sci Symp Conf Rec , 2007 , N15−3 . Doernberg J , Lee H S , Hodges D A . IEEE J Solid State Circuits , 1984 , SC-19 : 820 - 827 . IEEE J Solid State Circuits 10.13538/j.1001-8042/nst.22.178-184 Supported by Knowledge Innovation Program of the Chinese Academy of Sciences (Grant No. KJCX2-YW-N31) 2011-03-21 2011-06-20 2021-01-19 2011 Nuclear Science and Techniques 03 22