The impact of the integral non-linearity (INL) to the time resolution of HPTDC (High Performance Time to Digital Converter) is presented in this paper. An INL correction method based on look-up table (LUT), is proposed to minimize such INL and improve the time resolution. This scheme is implemented in a single Field Programmable Gate Array (FPGA) device for real-time compensation. The INL characteristic estimation is based on a statistical approach, in which a sufficiently large number of random input signals are measured. The prototype tests show that the deviation for time resolution due to INL can be reduced greatly, from more than 80 ps to less than 20 ps, which can meet the requirement of BES (Beijing Spectrometer) III Time-Of-Flight detector.