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Design and test results of a low-noise readout integrated circuit for high-energy particle detectors

NUCLEAR ELECTRONICS AND INSTRUMENTATION

Design and test results of a low-noise readout integrated circuit for high-energy particle detectors

ZHANG Mingming
CHEN Zhongjian
ZHANG Yacong
LU Wengao
JI Lijiu
Nuclear Science and TechniquesVol.21, No.1pp.44-48Published in print 20 Feb 2010
44800

A low-noise readout integrated circuit for high-energy particle detector is presented. The noise of charge sensitive amplifier was suppressed by using single-side amplifier and resistors as source degeneration. Continuous-time semi-Gaussian filter is chosen to avoid switch noise. The peaking time of pulse shaper and the gain can be programmed to satisfy multi-application. The readout integrated circuit has been designed and fabricated using a 0.35 μm double-poly triple-metal CMOS technology. Test results show the functions of the readout integrated circuit are correct. The equivalent noise charge with no detector connected is 500–700 e in the typical mode, the gain is tunable within 13–130 mV/fC and the peaking time varies from 0.7 to 1.6 μs, in which the average gain is about 20.5 mV/fC, and the linearity reaches 99.2%.

High-energy particle detectorsReadout circuitLow noiseASIC
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