3.1 Scintillator and package

We used GAGG:Ce scintillators manufactured by EPIC CRYSTAL Co. Ltd. Owing to the limited available size of GAGG:Ce scintillator, the detector comprises four GAGG:Ce scintillators to make full use of the area of a standard nanosatellite unit. A single GAGG:Ce scintillator has a surface area of 3.8 cm×3.8 cm and a thickness of 1 cm. GAGG:Ce has the advantages of a high density (6.5 g/cm³) and a high detection efficiency for gamma-rays of up to the MeV magnitude. The maximum emission spectrum for GAGG:Ce is approximately 530 nm, which is suitable for silicon-based photodetectors. Its high light yield (˜30–70 ph/keV) and ˜100 ns decay time provide a reasonable SNR when the SiPM arrays are used. The reflection layer is an enhanced specular reflector (ESR), a 65 μm polymer with high reflectance (> 98%) manufactured by 3M. A series of aluminized polyester films, which are generally used as the outermost cover of satellites, is used as the light shield layer. Owing to the good mechanical characteristics and non-hygroscopic properties of GAGG:Ce[9], no further layers are required to ensure sufficient moisture proofing and mechanical reinforcement. The simplified scintillator package provides a high detection efficiency of low-energy X-rays at a low cost.

With an increase in the number of parallel connected SiPMs on the same channel, the output capacitance and dark count rate of the SiPM array increase, which reduce the SNR. Therefore, an SiPM array smaller than the bottom area of the scintillator is utilized, similar to many detectors where the scintillator is coupled with SiPMs. The ESR is cut into a particular shape and fully covers the top and side of the scintillator. Moreover, there is a 2.2 cm×2.2 cm square window at the bottom-center for the scintillation light collection, as shown in Fig.2. By measuring the 661.7 keV full-energy peak positions of the ¹³⁷Cs source using different packages, we found that the light collection efficiency of this type of package is 62% that of a full coupling of the scintillator bottom surface. The optical grease is used for the optical coupling between the scintillator and SiPM array in the first payload. It is replaced with a silicon sheet in the second payload because of the fixed shape and good light collection efficiency of the silicon sheet.

Figure 2:Full-screen View

(Color online) ESR package (left), where the solid line is the outline, and the dashed line is the crease. Bottom view of a GAGG:Ce scintillator with the ESR package (right). The ESR is wrapped directly on the scintillator and taped on the side and bottom.

3.2 SiPM

The SiPM has numerous attractive features, such as small size, insensitivity to magnetic fields, low power consumption, and light weight, which are crucial in space mission applications[2], particularly nanosatellites. Therefore, four SiPM arrays are utilized as photoelectric converters. The SiPMs are the J-60035 type manufactured by SenSL and have a high photon detection efficiency (PDE) curve that matches reasonably with the emission spectrum of GAGG:Ce with a low dark count rate. Each SiPM chip has dimensions of 6.13 mm× 6.13 mm× 0.6 mm and consists of 22,292 single-photon avalanche diodes with a microcell fill factor of 75%. The bias voltage supplied to the SiPM is 28.5 V, which is considerably lower than that required by a PMT. To reduce the dark noise and output capacitance of the SiPM array and manage the costs, a 4×4 SiPM array is adopted with a 2.45 cm×2.45 cm area, which covers approximately one-third of the GAGG:Ce scintillator bottom surface area, as mentioned previously.

Four SiPM arrays are integrated on a single board designed and manufactured in-house (Fig.3). In addition, an SiPM through silicon via (TSV) package ensures that the SiPM fill factor of the printed circuit board (PCB) footprint is over 93%. Each array is powered independently, and the fast and standard outputs of every single SiPM chip are independently extracted to the FEE through a high-density connector QTE_040_03_F_D_A manufactured by SamTec. Because the breakdown voltage of the SiPM changes with temperature, which affects the gain of the SiPM, there is a temperature-monitoring chip on the other side of the PCB for the correction of the SiPM gain.

Figure 3:Full-screen View

(Color online) Top view (left) and bottom view (right) of the SiPM array board

3.3 FEE

A schematic of the FEE is shown in Fig.4. The standard output signals from one 4×4 SiPM array are directly shorted on the FEE and fed to a transimpedance amplifier (TIA) via an alternating current (AC) coupling, while the fast output signal pins are left floating. A 2 kΩ resistor connects the standard output of the array to the ground as the direct-current (DC) path of the standard output, which can restrain the current of the SiPM array to improve the system robustness. A standard high-speed amplifier OPA656 was adopted as the TIA amplifier, and the parameters of the TIA were optimized by detector modeling, as described in the next section. The TIA is followed by a low-pass filter circuit to reverse the signal and adjust its amplitude. The filter output is directed into two paths, which are connected to the trigger and peak hold circuits. The trigger circuit comprises a hysteresis comparator with an adjustable threshold and monostable pulse generator LTC6993, generating a high-level trigger signal for 2 μs without a retrigger. The high-bandwidth peak hold circuit comprises an operational transconductance amplifier (OTA) OPA615 and electronically controlled analog switch for discharge. Then, the four triggers and four peak hold signals are fed to the DAQ through a standard 2.54 mm connector.

Figure 4:Full-screen View

Functional block diagram and output pulse shape of the FEE for one GRID channel

3.4 Detector optimization

For such a compact detector, considerable efforts have been invested to improve the SNR, such as the scintillator reflector design, SiPM array design, and high-speed amplifier application. However, we do not have flexibility in terms of the scintillator and SiPM, whereas the TIA parameters significantly affect the SNR and can be analyzed and optimized in detail.

The transient response of the GAGG:Ce scintillator can be expressed as a single exponential decay signal, and its normalized transfer function is

where τ_GAGG = 100 ns is the GAGG:Ce decay time.

An accurate electrical model of SiPM is complex. However, neglecting the equivalent input resistance of FEE and quench capacitance can simplify the SiPM transient response to a single exponential decay signal, with a normalized transfer function as follows:

where τ_SiPM ≈ 38 ns is the recovery time of the SenSL J-series SiPM[10, 11].

With proper selection of feedback capacitance and resistance, the TIA can be treated as a second-order Butterworth filter with the following transfer function

where Ω=2π F, $F=\sqrt{GBP/(2\pi R_{\text{F}}{C}_{\text{D}})}$ is the approximate -3 dB bandwidth of the TIA circuit, GBP is the gain bandwidth product of OPA656, R_F is the feedback resistance, and C_D is the output capacitance of the SiPM array. Here, Q = 0.707 is the quality factor of the Butterworth filter. Thus, the output pulse waveform of the TIA can be expressed as

where E is the incident photon energy, LY is the light yield of GAGG:Ce, CE is the scintillation light collection efficiency determined by the scintillator and its packaging, PDE is the PDE of the SiPM array, e is the elementary charge, and G is the gain of the SiPM.

The equivalent output noise voltage of the TIA contributed by the SiPM dark counts can be treated as a random pulse train. The standard deviation of the dark count noise can be obtained from Campbell’s theorem [12]

where $\overline{n}$ is the dark count rate, $\overline{n}$ ≈ 90 kHz/mm² × 576 mm² for one SiPM array at 20 ℃ with an operation voltage of 28.5 V, and h(t) is the dark count pulse. The dark count pulse can be considered a Dirac delta pulse e G δ(t) convoluted by the SiPM and TIA response function; thus,

Considering that the output noise of the TIA is bandlimited, the equivalent output noise voltage contributed by the TIA can be estimated by a simple expression

where I_N and E_N are the input current and voltage noise of OPA656, respectively, 4kTR_F is the thermal noise of the feedback resistor, and F₀ ≈ 1 MHz is the band-limiting frequency of the TIA and low-pass filter system. Therefore, the SNR can be defined as

The SNR varies with the feedback resistance R_F, as shown in Fig. 5. R_F was set to 500 Ω to satisfy both the SNR and appropriate gain.

Figure 5:Full-screen View

SNR variation according to R_F with an incident photon energy of 59.5 keV at 20 ℃, SiPM operating voltage of 28.5 V, and scintillator light yield of 32 ph/keV. The maximum SNR value is 82 at R_F = 330 Ω.

4.1 Data acquisition electronics

The DAQ board comprises the power regulator, analogue-digital converters (ADCs), MCU, embedded multimedia card (eMMC), and communication interface to process signals from the FEE, supply electricity for all analog and digital devices, supply and control bias voltage of SiPM arrays, process commands, format data for storage, and transmit data to the spacecraft, as shown in Fig. 6. The power system regulates the +5 V input voltage to ±5 V for the analog devices, +2.5 V for the ADCs, and +3.3 V for the digital devices. An adjustable bias voltage of 0–40 V for the SiPM arrays can be generated through the SiPM bias voltage supply module, which can also monitor the bias voltage and leakage current. The DAQ core is a 32-bit ARM Cortex M0+ MCU KEA128 with 16 kB static random-access memory (SRAM) and 128 kB flash manufactured by NXP, which is an automotive-level MCU optimized for cost-sensitive applications and focuses on exceptional electromagnetic compatibility (EMC) and electrostatic discharge (ESD) robustness. A 512 MB single-layer cell (SLC) eMMC stores the raw science and housekeeping data with high reliability. The eMMC can store approximately 12 h of data based on existing data format definitions and background count rates of 500 counts/s. Peak hold signals from the FEE are sampled by four individual ADCs with 1M sample rate and 16-bit precision. The four internal ADCs of the MCU are alternatives of each other and can be selected through a gating switch for redundancy.

Figure 6:Full-screen View

Functional block diagram of DAQ and its connection with FEE, SiPM Carrier, and payload on-board computer board (POBC). The red lines represent the power bus, green lines represent digital signals, and blue lines represent analog signals. The debug interface and TTL-LVDS converter are not shown.

As shown in Fig. 6, the DAQ electronics provides an interface with spacecrafts, which comprises a data bus using differential SPI protocol with LVDS level for the raw science and housekeeping data transmission, a UART interface for firmware update, a PPS interface for time calibration, and some general-purpose input/output (GPIO) interface for MCU reset, data request, boot configuration, and burst trigger (denoted as Telemetry and RESET).

4.2 Flight firmware

The flight firmware operates on the MCU without an operating system and comprises two parts: the boot loader and application program, residing in the internal flash memory of the MCU. The firmware provides limited online data processing capacity because of the low MCU performance. However, the configuration of all hardware, response to the triggers, command reception and processing, data storage and transmission, control and monitoring of the detector, and the application program update are provided, which can satisfy all necessary on-orbit requirements.

After the MCU is powered on, it first runs the boot loader to check the Config &Trigger pin level, and updates the application program if high, or jumps to the application program if low.

The application program is interrupt driven. Interrupts are generated on the following events:

• FEE trigger;

• Timer interruption per second to record housekeeping data;

• PPS from the GPS module;

• Spacecraft commands.

When the FEE trigger signals interrupt the MCU, the peak hold signals are sampled by four individual ADCs or four internal ADCs of the MCU, and the internal clock, PPS count, and UCT time will be recorded. When the converter sampling is finished, the MCU discharges the peak holder. Four channels work in a single thread in the present configuration, so other channels are in dead time, while one channel is triggered. The peak values and time information are stored in the eMMC. Every 1 s, the MCU records the housekeeping data, as listed in Table 2. The internal clock is recorded, while the PPS triggers the MCU for accurate time reconstruction of incident photons.

Currently, the application program processes the following commands from the spacecraft.

• Test communication status.

• Set the bias voltage of each SiPM array and trigger threshold for each channel.

• Process all modules self-test.

• Update the Coordinated Universal Time (UTC).

• Read data from eMMC.

• Read the housekeeping data.

• Set the ADC chosen switch.

• Erase the eMMC.

In daily operation, the instruction sequence will be sent to the spacecraft from the Earth station. Then, the spacecraft adjusts its attitude, powers on the detector, and controls the detector to set the SiPM bias voltage starting the observation, and powers off the detector after a specific observation time. The data stored in the detector eMMC will be read to the POBC’s eMMC and downloaded at the appropriate time.

4.3 Data format

The DAQ produces two types of data packets: the raw science and housekeeping data. All the raw data are stored in the eMMC as a series of 512-byte packages. The definitions of housekeeping and raw science data are summarized in Tables 2 and 3, respectively. In a 512-byte raw science data package, the first trigger event occupies 3–25 bytes, and the other 43 trigger events occupy 26–499 bytes in the same format as shown, from 26 to 36 bytes.

In a 512-byte housekeeping data package, there are seven housekeeping datasets occupying bytes 3–492 in the same format as shown in bytes 3–72. “UTC”, “PPS count,” and “Internal clock” are indicated when the housekeeping data package is recorded. “PPS to UTC” indicates the corresponding PPS count last time UTC is received and “Internal clock to PPS” denotes the corresponding internal clock last time PPS is received. From these data, we can precisely correspond the MCU internal clock to the UTC time, which is significant for GRB triangulation.

5.1 Low-energy performance

Based on the SNR expression derived previously, if the minimum SNR required is 6, which means that the peak value of the signal amplitude is six times the standard deviation of noise, the lower limit for the low-energy detection can be derived theoretically. The light yield of the GAGG:Ce is calibrated experimentally in-house. The GAGG:Ce and a LaBr₃:Ce scintillator with a known light yield are irradiated by a ²⁴¹Am source, respectively, and the same PMT and electronics are used for the scintillation light readout. Considering the quantum efficiencies of the PMT cathode, the light yield of GAGG:Ce is estimated to be 16 ph/keV by comparing the 59.5 keV peak positions. Under normal observation conditions, where the temperature is 20 ℃ and SiPM operating voltage is 28.5 V with a scintillation light collection efficiency of 62% and PDE of the SiPM array, defined by the PDE of a single SiPM multiplied by the array’s fill factor, of approximately 27.9%, the lower limit of the detector is 13 keV. The light yield of the crystal is lower than that reported in a previous study [9]. The provider of the GAGG:Ce crystal has improved the crystal growth process. Therefore, a crystal with a higher light yield will be used in the next detectors, with the lower limit of the GRID expected to extend to 10 keV. In addition, with the development of low dark count rates [15] and high PDE SiPMs [16], the low-energy performance of these types of detectors can be further improved.

The trigger threshold was set to 20 mV (approximately 13 keV) and a spectrum of ²⁴¹Am with 59.5 and 13.5 keV X-rays was measured, as shown in Fig.7. The performances of the four channels are not exactly the same owing to the difference in the scintillator light yield and light collection efficiency. However, the peak of the 59.5 keV X-ray can be observed clearly. The peak at 13.5 keV and dark count noise are mixed together near the threshold.

Figure 7:Full-screen View

Spectrum of ²⁴¹Am with a trigger threshold of 20 mV for four channels.

5.2 Energy resolution

The energy resolution results were calibrated by radioactive sources in the laboratory, which handled the detector and electronics noise, as well as the statistical fluctuation and energy nonlinearity. The sources used for calibration with their emitted photon energies are listed in Table 4. As shown in Fig. 8, the energy resolution $\frac{\Delta E}{E}$ is approximately proportional to $\frac{1}{\sqrt{E}}$ and is approximately 9% at 662 keV. The poor fitting in the low-energy region is due to the nonlinearity of GAGG:Ce, particularly the distinct inconsistency at 81 keV, which is caused by the X-ray absorption edge of GAGG:Ce at approximately 70 keV [9].

Figure 8:Full-screen View

(Color online) Dependence of the detector energy resolution of four channels, and fitting curves and equations in terms of y=axb.

5.3 High-rate performance

Two effects typically impair the performance of scintillation detectors at high photon rates: dead time and pulse pile-up. The pulse pile-up occurs when the count rate is so high that the pulses from successive events overlap in the FEE, which causes distortions in the measured spectrum that are difficult to characterize. These types of distortions are generally treated as systematic errors in the determination of the gamma-ray spectrum. Owing to the high bandwidth of the TIA and filter, the pulse of a single event lasts less than 1 μs from generating a trigger to recover to baseline, which incurs little distortion in the measured GRB spectrum according to the relevant discussion about the Fermi GBM detector[13]. However, there is another type of pulse pile-up occurring at the peak-hold circuit; that is, a small signal will be overridden by a larger signal. This problem can be solved by a limit switch that restricts the peak-hold circuit input voltage to the ground level when the channel is triggered.

The nominal detector dead time is approximately 50 μs per event, which mainly consists of the MCU–ADC communication and MCU–eMMC communication, as shown in Fig. 9. However, in the last firmware version, which is used in the second GRID detector, the dead time is optimized to 15 μs with the same hardware design.

Figure 9:Full-screen View

Contribution of dead time in GRID detector. When the MCU is triggered by the FEE trigger output signal, a conversion input (CNV) is generated after 6 s to initiate the ADC conversions. The ADC conversion takes 4 μs, which is followed by a 26 μs MCU–ADC SPI communication time. Then, the discharge signal is generated after 2 μs and lasts for 12 μs until the ADC value is wrapped in the eMMC.

5.4 Temperature dependence

As the breakdown voltage of an SiPM varies with temperature, the gain of SiPM arrays is significantly affected by the temperature. The relationships between the gain, temperature, and bias voltages should be calibrated[17]. Figure 10 shows the calibration results for the temperature dependence of the GRID detector channel 0. The gain decreases with increasing temperature, and other channels show the same changing rule as channel 0. In a GRID detector, the bias voltage does not vary with temperature to stabilize the gain. The temperature of SiPM arrays will be recorded for offline correction of the energy-channel relation of the detector.

Figure 10:Full-screen View

(Color online)Calibration results for the temperature dependence of the GRID detector channel 0 using ²⁴¹Am source under bias voltages between 27.0 – 29.0 V.