Structure

The CXPD electronics were designed on the basis of 1U, which is a standard unit (a cube of volume 10 cm × 10 cm × 10 cm and weight approximately 1 kg). For detection tasks, the electronics system was divided into three printable circuit boards (PCBs), depending on the main function. In the horizontal direction, the CXPDES consisted of three boards with dimensions of 94 mm × 94 mm. In the vertical direction, the board spacing was 10 mm, and the thickness of each board was 2 mm. The total height of the CXPDES, including the device height, was 44 mm. The front-end electronics (FEE) board primarily consisted of GPDs, silicon photomultiplier (SiPM) trigger circuits, and GPD data readout circuits. The back-end electronics (BEE) board comprised the main controller, power regulator, data and firmware memory, communication interface and devices, and an external clock. The high voltage (HV) board comprised a GMCP lower-surface feedback circuit, dividing circuits, HV chip, HV configuration, and HV monitoring. Interboard communication and power supply were via a field-programmable gate array (FPGA) mezzanine card (FMC). The CXPDES had only one external interface, which was sufficient for power supply, data transmission, command transmission, and in-orbit upgrades. Fig. 1 shows the overall schematic of the CXPDES, and we will describe the detailed design in subsections.

Fig. 1Full-screen View

(Color online) two GPDs are placed symmetrically on the FEE board with a center line and the surrounding positioning holes are used to fix the electronics board to the payload shell.

FEE

The GPD must be placed on top of the CXPDES for soft X-ray polarization measurements. On the FEE board, two circular pin arrays with a diameter of 36 mm and a hole of 0.8 mm were used to connect to the GPDs. Twenty of the array pins were control pins for Topmetal-II^- and four pins were control pins for the GPD environmental monitoring sensors. A photograph of the topmetal-II ^- sensor bonded to a ceramic pedestal and a schematic of the sensor architecture are shown in Fig. 2. The top metal-II ^- output signal is a single-ended analog signal, whereas the input of the high-speed analog-to-digital converter (ADC) (< 10 Million Samples per second (MSPS)) is usually a differential signal. The original single-ended signal was converted to a differential signal by a fully differential amplifier with an amplification factor of 1, digitized by a 40 MSPS, 12-bit parallel ADC, and finally transmitted to the BEE board via the FMC. Fig. 3(a) shows the functional block diagram of the FEE board. To achieve optimal reliability, the data acquisition process was divided into two independent circuits for acquiring data from the two GPDs. The external SiPM signal was processed by a charge-sensitive preamplifier, CR-RC shaper, and comparator before digitization and transmitted to the BEE board via the FMC [20]. Both Topmetal-II^- and the comparators required configuration signals with settable voltage values and two independent multi-channel digital-analog converters (DACs) to provide the required configuration signals. The chips may suffer from single-particle effects because of the large number of energetic particles in space. The core design concept of the FEE board was to ensure that a single detector could independently perform X-ray polarization measurements. The two detectors did not affect each other, thereby minimizing system risk.

Fig. 2Full-screen View

(Color online) Schematic of the sensor architecture (left) and photograph of a ceramic base. The Topmetal-II^- sensor is placed in the center of the base, and a temperature and gas pressure sensor is positioned below it.

Fig. 3Full-screen View

(Color online) Functional block diagram of CXPDES

BEE

Figure 3(b) shows the functional block diagram of the BEE board. The multiple high-speed devices and in-orbit algorithms in CXPDES require powerful computing capabilities in the main controller. A Xilinx Kintex-7 family of FPGAs was used. The FPGA has higher speed and more powerful computing power than a general-purpose processor, which has obvious advantages in high-speed digital circuit design and multichannel signal handling [21]. The FPGA was configured with a 1 GB flash device. Multiple files were stored in the flash memory to enable correct system booting in case of raw file damage. The backup configuration file was booted in the address order to reduce the system boot risk in the case of an incorrect FPGA configuration file. In the special environment of satellite electronics, external memory allows the electronic system to support in-orbit upgrades to adjust the firmware during satellite operation. The BEE board was connected to the satellite platform using a 15-pin custom functional aerospace-specific connector and the main functional pins are listed in Table 1.

The CXPDES used 5 V and 12 V power supplies as the main power supply and solely for HV devices, respectively. A power supply module converted the 5 V power supply to generate 1.0, 1.2, 2.5, 3.3, 4.8, and -5 V for different devices. The detector data reached data rates of 32 Mbps or higher for uncompressed or extreme event rates. The data rate was proportional to the scanning frequency of Topmetal-II^-, which was related to the detector performance; therefore, Fast Ethernet was used for data transfer to match the data transmission requirements at a 2 MHz Topmetal-II^- scanning frequency. The satellite platform transmitted commands to the BEE board via a Controller Area Network (CAN) bus, which was a standard bus for local area networks widely used in control systems and had advantages in terms of security, reliability, and low power consumption [22, 23]. Functions such as startup detection, device management, switch-on/off configuration, and data transmission control were executed via the CAN bus. The details are introduced in Section 3. CXPDES and satellites do not transmit data in real time, and the data are stored in non-volatile memory. The detector generated 28.8 GB of uncompressed data per hour with data write and read speeds of 64 Mbps. Support for the embedded multimedia card (eMMC) 5.0 protocol of 64 GB nand flash memory was used to store data.

HV

The HV chip used in the CXPDES was 16 mm high and was placed on the bottom layer of the HV board. Fig. 3(c) shows the functional block diagram of the bottom board and the HV board is dedicated to place HV devices. The core device on the HV board was the A7504N, which generates a maximum negative high voltage of -4 kV at 100 μA. The output route was kept away from the metal to avoid a high-voltage discharge when the solder mask layer breaks down, as shown in Fig. 4. The A7504N set the output voltage and current via the voltage and current setting pins and provided the actual output voltage and current via the feedback pins. The high-voltage output was divided by a dividing circuit to obtain the voltage required for the GPDs. The high-voltage flexible wire passed through the non-metalized holes of the FEE and BEE boards to output a high voltage to the GPD. This avoided the influence of high voltages on other devices. In our experiments, we found that the GMCP lower surface generated a pulse signal at the moment of photon arrival which could be used as a GPD trigger signal after the comparator and to improve the energy resolution by measuring the amplitude of this signal. In addition, to ensure independence, the bottom board had two separate GMCP lower-surface circuits corresponding to the two GPDs, and both GMCP lower-surface circuits had comparators and ADCs.

Fig. 4Full-screen View

(Color online) The high voltage discharge area is located in the center red box (top). The discharge phenomenon disappears when the high voltage chip and high voltage output are located on the bottom and top layer of the PCB respectively (bottom).

Flight firmware

A top-down approach was used for the firmware to consider the scalability of the development. The block diagram of the architecture is shown in Fig. 5. The clock module was configured with all clocks. Four different clocks were used in the firmware, and the system, Ethernet, GPD sampling, and Topmetal-II^- clocks were 200, 125, 40, and were 2 MHz, respectively. Ethernet used UDP protocol with a transmission rate of 100 Mbps to communicate with the satellite computer. The UDP message consisted of a 36 bytes header and a 1024 bytes data segment, and the message format was defined by the satellite platform. The CAN module supported the CAN2.0B protocol with a communication baud rate of 500 kbps and a sampling rate generally set at the maximum baud rate tolerance, which was typically 75 percent. There was contention on the bus, and the host computer needed to enable hardware retransmission to communicate with the OBC using 29-bit CAN ID extension frames. The command-decoding module parsed the remote-control data from the CAN and controlled different modules to work according to the command content. Data storage was divided into four steps. First, the erosion module removed scatter noise from the sampled GPD data. Second, the denoised GPD data were zero-compressed using the compression module. Third, the trigger module determined whether to store the data according to the compressed data. Finally, the data were stored in the eMMC by the storage module. After receiving the command, the upload module uploaded data to the satellite platform and configured the next storage address. The upload module supported data retransmission and specified data reading.

Fig. 5Full-screen View

Block diagram of the firmware. The payload on-board computer board (POBC) sends commands to the command decode module, which mainly controls the operation of CXPDES.

The typical polarization measurement workflow is as follows.

Power on: The satellite computer supplies power to the payload according to the preset plan. The CXPDES completes the initialization within 50 μs after powering on and receives the control command from the satellite platform after the initialization is completed. The control command contains the relevant settings for the detection mission (such as detector settings and high-voltage settings). Finally, CXPDES starts the detection mission after receiving the detector start command.

During the detection process, the Topmetal-II^- output data are quantized, eroded, compressed, triggered, and stored in the eMMC in real time. The GMCP lower-surface signal, SiPM trigger data, Coordinated Universal Time (UTC), system operation status, and monitoring data are stored in an eMMC with different headers. The management module inside the CXPDES performs real-time adjustments based on the system operation status.

Shutdown: Before shutdown, the satellite platform sends a shutdown command to the payload. The payload stores the address of untransmitted data, which is read at the next power on initialization. The new GPD data continues to be stored after the address, and this design can complete lossless storage and data transmission between multiple detection missions. The CXPDES sends a power-off command to the satellite platform after the voltage drop in the high-voltage circuit is completed and the CXPDES stops working.

Command and control

Commands and data transmission is done between the satellite computer and CXPDES. There are 17 commands in the CXPDES, each of which contains three types of information: frame type, command number, and command parameters. Each command was 8 bytes long. The functions of the simplified commands are shown in Table 2.

A variety of monitoring data were packaged and sent to the satellite computer via the CAN bus at a frequency of 1 Hz in the test mode. The monitoring data included the GPD internal temperature and pressure, HV module output voltage and current, and CXPDES operating status. Commands 02–04 configured the high-voltage output voltage, current, and enable. Commands 05 to 11 were used to set the pixel chip reference voltage, analog data output bias voltage, SiPM threshold voltage, and GPD operating mode. Changing the pixel chip reference voltage changed the decay time and particle sensitivity of the GPD. The analog data output bias voltage maintained the output of the GPD within the valid input range of the ADC, while the SiPM threshold voltage was used to calibrate the SiPM detection validity. The CXPDES received 12 commands to transmit the stored data to the satellite computer, and 13 commands were used to control the compression efficiency. Commands 14 and 15 adjusted the trigger efficiency of the two GMCP lower-surface circuits. Commands 16–18 are listed in Table 2.

Power on test

Voltage variations owing to the satellite power supply affect the GPD performance. The DC-DC module of the CXPDES provided a stable power supply for the GPDs. However, it generates an input inrush current when the CXPDES is powered on. An excessive input inrush current can affect other devices and loads that use the same input power supply. We first provided a 5 V power supply, and then a 12 V power supply according to the CXPDES startup sequence. The inrush currents corresponding to the 5 V and 12 V power supplies are 1.04 A/20 ms and 240 mA/8.2 μs, respectively (Fig. 9). The input inrush currents of both power supplies were within the normal range. When the CXPDES was in the detection state, the stable working current of the 5 V power supply and the power consumption were 0.83 A and 4.15 W, respectively; the stable working current and power consumption of the 12 V power supply were 0.03 A and 0.36 W, respectively. The total power consumption of the CXPD was 4.51 W, which was sufficient to meet the Cubesat’s requirement of power consumption within 10 W for a single payload.

Fig. 9Full-screen View

Top: 5 V input inrush current, Bottom: 12 V input inrush current.

The high-voltage boost and buck require time to complete. After setting the high voltage value, we designed an internal boost and buck logic to complete the boost and buck at 100 V/s. The experimental results are shown in Fig. 10.

Fig. 10Full-screen View

(Color online) Set the voltage to -2600V, and for better display, draw from three seconds before the start to three seconds after the completion of boost and buck.

High-speed performance

The GPD data were stored directly in the eMMC on the board and transmitted to the satellite platform when a satellite read command was received. The GPDs data can be stored for up to 75 days because of the cyclic overwrite method of the eMMC. In extreme cases, the Topmetal-II^- scanning frequency was 2 MHz, and the maximum data rate was 128 Mbps. We tested the read/write speed of the eMMC at different clock frequencies using a logic analyzer (Fig. 11). The eMMC write rate at clock frequencies above 45 MHz satisfied the demand for the GPD maximum data rate. Meanwhile, the Ethernet transmission rate of 20±4 Mbps was determined by the satellite platform. The read rate of the eMMC satisfied the transmission-rate demand of the satellite platform.

Fig. 11Full-screen View

(Color online) Read/write speed taken as average after repeated tests. The eMMC read/write error occurs when the clock frequency is higher than 77 MHz.

Functional test

The experimental setup is shown in Fig. 12. The external interface of the CXPDES is a custom interface, and we converted the interface to a standard 5.5 mm power round connector, Registered Jack 45, and a CAN bus via a conversion board.

Fig. 12Full-screen View

(Color online) The 8 mm height adapter pins were used for the test to replace the GPDs, and finally, both GPDs were directly soldered on the FEE board.

After powering on the CXPDES, we set it up via the host computer with the parameters listed in Table 4. GPD was started after the setup and Bragg diffraction was used to generate 8 keV line polarized X-rays for the test. The shutdown command was sent after a period of time to shut down the CXPDES. The above process was repeated, during which the CXPDES devices operated properly, and all commands were executed correctly to obtain the expected feedback. The calibration results from the host computer indicated that all data were transmitted without loss or error. The track image shown in Fig. 13 was obtained by offline analysis. The experimental results demonstrate that the electronics system can operate properly and perform X-ray polarimetry missions.

Fig. 13Full-screen View

(Color online) 8 keV X-ray tracks

For the stability test, we powered on the electronics system. Tests were conducted for 60 consecutive days without any abnormalities.