Output signals of SDDs

In previous studies, the output signal of the charge-sensitive preamplifier was generally approximated as a step signal or an exponentially growing signal with a single time constant, and the signal output by the SDD was approximated as an impulse signal or an exponentially decaying signal with a single time constant [19]. With the development of digital systems, the sampling rate has been increased by high-speed ADCs, the amount of noise in semiconductor detector systems has been reduced, and the precision of the sampling has been improved. The rise time of a nuclear pulse can be accurately detected and described. Our experimental results indicated that the output signals of the SDDs should be approximated as dual-exponential signals, as shown in Fig. 2(a).

Fig. 2Full-screen View

(Color online) Simulations of signals output by the detector, preamplifier, and C-R system. a Simulation of the dual-exponential signal output by the SDD. b Simulation of the integral signal output by the preamplifier. c Simulation of the signal output by the C-R system.

The dual-exponential signal is defined as follows: $y1\left(t\right)=\{\begin{array}{l}0;\\ A\cdot \left(e^{-t/{\tau }_2}-e^{-t/{\tau }_3}\right);\end{array}\begin{array}{c}t<0\\ t\ge 0\end{array},$ (1) where A represents the pulse amplitude, and τ₂ and τ₃ represent the falling and rising parts of the pulse, respectively.

Output signals of integral-reset-type charge-sensitive preamplifier

Charge-sensitive preamplifiers have low electronic noise, and the amplitudes of their output signals are hardly affected by parameters such as the interelectrode capacitance, open-loop input capacitance, and voltage gain. The preamplifiers adopted in high-resolution energy spectrum measurement systems are almost always charge-sensitive. Charge-sensitive preamplifiers include the resistance-feedback, direct-current (DC) optical-feedback, pulse optical-feedback, and integral-reset types. The circuit of the integral-reset-type charge-sensitive preamplifier used in digital systems is shown in Fig. 1.

The transformation of an input signal into an output signal by an integral-reset-type charge-sensitive preamplifier is mathematically described as a convolution of the input signal $y1\left(t\right)$ and the unit step function $\text{ε}\left(t\right)$. The convolution is expressed as $y2\left(t\right)=y1\left(t\right)\ast \epsilon \left(t\right).$ (2) Eq. (2) can be rewritten as follows: $y2\left(t\right)=\{\begin{array}{l}0;\\ A\cdot \left({\tau }_3\cdot \left(e^{-t/{\tau }_3}-1\right)+{\tau }_2\cdot \left(1-e^{-t/{\tau }_2}\right)\right);\end{array}\begin{array}{c}t<0\\ t\ge 0\end{array}.$ (3)

The output signal of the integral-reset-type charge-sensitive preamplifier is shown in Fig. 2(b).

C-R convolution transform of signals

The charge collected by the integral-reset-type charge-sensitive preamplifier increases with the accumulation of the detector output and DC bias, and it is not cleared until reset. The C-R differential circuit, as shown in Fig. 1, was adopted to process the output signal of the preamplifier. DC components were eliminated, and independent signals were obtained after the output signal was processed by the C-R differential circuit. The transfer function of the C-R differential circuit was obtained via analysis: $H\left(s\right)=\frac{V_o\left(s\right)}{V_i\left(s\right)}=\frac{RCs}{1+RCs}$ (4) $H\left(s\right)=1-\frac{1}{RCs+1}.$ (5)

In the time domain, the impulse response function of the C-R differential circuit is expressed as $H\left(t\right)=\delta \left(t\right)-a\cdot e^{-at}\cdot \epsilon \left(t\right),$ (6) where δ(t) is the unit impulse function and $a=\frac{1}{RC}$. Equation (6) is obtained by applying the inverse Laplace transform to Eq. (5). As indicated by Eq. (6), the impulse response function of the circuit is a linear combination of an exponentially decaying signal and unit impulse signal. The output signals of the integral-reset-type charge-sensitive preamplifier are processed by the C-R differential circuit, and the results are given by Eq. (7), where τ₁=RC. $\begin{array}{c}F\left(t\right)=A\cdot \left({\tau }_2-{\tau }_3-{\tau }_2\cdot e^{-t/{\tau }_2}+{\tau }_3\cdot e^{-t/{\tau }_3}\right)\cdot \epsilon \left(t\right)\\ \cdot \left(\delta \left(t\right)-\frac{1}{{\tau }_1}\cdot e^{-t/{\tau }_1}\cdot \epsilon \left(t\right)\right)\end{array}$ (7)

Equation (7) can be simplified to Eq. (8). The output signal of the C-R differential circuit is shown in Fig. 2(c). $\begin{array}{c}F\left(t\right)=A\cdot \left({\tau }_2-{\tau }_3-{\tau }_2\cdot e^{-t/{\tau }_2}+{\tau }_3\cdot e^{-t/{\tau }_3}\right)\cdot \epsilon \left(t\right)\\ \cdot \left(\delta \left(t\right)-\frac{1}{{\tau }_1}\cdot e^{-t/{\tau }_1}\cdot \epsilon \left(t\right)\right)\end{array}$ (8)

In the frequency domain, the output signals of the C-R differential circuit can be expressed by Eq. (9) using the Laplace transform. $F\left(s\right)=\left(\frac{{\tau }_2-{\tau }_3}{s}-\frac{{\tau }_2\cdot {\tau }_2}{{\tau }_{2}s+1}+\frac{{\tau }_3\cdot {\tau }_3}{{\tau }_{3}s+1}\right)\cdot \left(1-\frac{1}{{\tau }_{1}s+1}\right)$ (9)

Eq. (9) can be rewritten as follows: $\begin{array}{c}F\left(s\right)=\left({\tau }_2-{\tau }_3-\frac{{\tau }_2\cdot {\tau }_2}{{\tau }_2-{\tau }_1}+\frac{{\tau }_3\cdot {\tau }_3}{{\tau }_3-{\tau }_1}\right)\cdot \frac{{\tau }_1}{{\tau }_{1}s+1}+\frac{{\tau }_1\cdot {\tau }_2}{{\tau }_2-{\tau }_1}\\ \cdot \frac{{\tau }_2}{{\tau }_{2}s+1}-\frac{{\tau }_1\cdot {\tau }_3}{{\tau }_3-{\tau }_1}\cdot \frac{{\tau }_3}{{\tau }_{3}s+1}\end{array}$ (10)

Equations (8) and (10) are equivalent and express the output signals of the C-R differential circuit in the time and frequency domains, respectively.

Cascade IRS algorithm for the ideal dual-exponential pulse

Unit IRS methods for ideal dual-exponential pulses have been studied in attempts to find a digital solution to semiconductor detector systems. A three-stage cascade IRS (TCI) system, which is composed of INV_RC, INV_CR, and DIF systems, is designed to process the ideal dual-exponential pulse, as shown in Fig. 3.

Fig. 3Full-screen View

Processing flow of the ideal dual-exponential pulse.

In Fig. 3, let the input signal of the INV_RC system be z[n], the output of the INV_RC system be y[n], the output of the INV_CR system be x[n], and the output of the DIF system be p[n]. Then, the following equations are obtained: $y\left[n\right]=INV\_RC\left(z[n],m\right)$ (11) $x\left[n\right]=INV\_CR\left(y[n],M\right)$ (12) $p\left[n\right]=DIF\left(x[n]\right).$ (13)

The three-stage cascade IRS algorithm is derived via the following steps. The following equation is derived from the digital solution of the INV_RC system [20]: $y\left[n\right]=z[n]+m\cdot \left(z[n]-z[n-1]\right),m=\frac{R\cdot C}{\Delta t}.$ (14)

The following equation is derived from the digital solution of the INV_CR system [21]: $x\left[n\right]=\left(\frac{1}{M}\right){\displaystyle \sum y\left[n\right]}+y\left[n\right],M=\frac{R\cdot C}{\Delta t}.$ (15)

The following equation is obtained from Eqs. (14) and (15): $x\left[n\right]=\frac{{\displaystyle \sum z\left[n\right]+m\cdot z\left[n\right]}}{M}+z\left[n\right]+m\cdot \left(z\left[n\right]-z\left[n-1\right]\right).$ (16)

Equation (17) can be obtained by integrating both sides of Eq. (16). Equation (17) describes the digital signal transformation of a dual-exponential signal into a step signal in the form of digital integration. ${\displaystyle \sum x\left[n\right]}=\left(\frac{1}{M}\right)\cdot \left({\displaystyle \sum {\displaystyle \sum z\left[n\right]+\left(M+m\right)\cdot {\displaystyle \sum z\left[n\right]+M\cdot m\cdot z\left[n\right]}}}\right)$ (17)

The impulse signal is the first derivative of the step signal, that is, p(n)=x(n)́; thus, Eq. (18) is obtained, which describes a three-stage cascade deconvolution IRS algorithm for an ideal dual-exponential pulse. $p\left[n\right]=\frac{\left(1+m+M+m\cdot M\right)\cdot z\left[n\right]-\left(m+M+2\cdot M\cdot m\right)\cdot z\left[n-1\right]+M\cdot m\cdot z\left[n-2\right]}{M}$ (18)

When the sampling rate of the digital system is sufficiently high, m and M in Eq. (18) can be approximated as integers.

MCD-IRS algorithm for signals of semiconductor detector

The signals of the semiconductor detector, which are expressed by Eq. (8), can be deconvoluted into unit impulses step-by-step, as shown in Fig. 4.

Fig. 4Full-screen View

MCD-IRS

In Fig. 4, let the input signal of the INV_CR system be Y[n], the output of the INV_CR system be X[n], the output of the DIF system be Z[n], and the output of the TCI system be P[n]. The MCD-IRS algorithm for the output signals of the semiconductor detector system can be derived as follows.

In the first stage, the output signals pass through the INV_CR system to generate signals, as described by Eq. (3). The digital convolution of the INV_CR system is given as $X\left[n\right]=k\cdot {\displaystyle \sum Y\left[n\right]+Y\left[n\right],k=\frac{\Delta t}{R\cdot C}}.$ (19)

In the second stage, the signals generated in the first stage are passed through the digital DIF system to generate the output signals expressed by Eq. (1). The digital solution for the DIF system is given by Eq. (20). $Z\left[n\right]=X\left[n\right]-X\left[n-1\right]$ (20)

In the third stage, the output signals of the DIF system are processed using the TCI system described by Eq. (18), and impulse signals are generated. The digital solution for the TCI system is given by Eq. (21). $P\left[n\right]=\frac{\left(1+m+M+m\cdot M\right)\cdot Z\left[n\right]-\left(m+M+2\cdot M\cdot m\right)\cdot Z\left[n-1\right]+M\cdot m\cdot Z\left[n-2\right]}{M}$ (21)

The digital solution expressed by Eq. (21) can be simplified to Eq. (22). Additionally, Eq. (22) can be simplified to Eq. (23), by setting K = 1/k. Eqs. (22) and (23) express the digital solutions for semiconductor detector systems. $P\left[n\right]=\frac{\left(1+m+M+m\cdot M\right)\cdot \left(\left(1+k\right)\cdot Y\left[n\right]-Y\left[n-1\right]\right)-\left(m+M+2\cdot M\cdot m\right)\cdot \left(\left(1+k\right)\cdot Y\left[n-1\right]-Y\left[n-2\right]\right)+M\cdot m\cdot \left(\left(1+k\right)\cdot Y\left[n-2\right]-Y\left[n-3\right]\right)}{M}$ (22) $P\left[n\right]=\frac{\left(1+m+M+mM\right)\left(1+K\right)Y\left[n\right]-\left(\left(1+2m+2M+3mM\right)K+m+M+2mM\right)Y\left[n-1\right]+\left(\left(m+M+3mM\right)K+mM\right)Y\left[n-2\right]-mMK\cdot Y\left[n-3\right]}{M\cdot K}$ (23)

In Eqs. (22) and (23), the result P[n] is only related to the input signal Y[n] and is unrelated to the intermediate calculation result. For designing a real-time signal-processing system using Eq. (22) or (23), high-speed pipeline schemes for parallel processing can be adopted.

Signal simulation and comparison

Equation (24), which was proposed in [1], describes the output signals of the semiconductor detector system in the time domain. $F1\left(t\right)=B\cdot e^{-t/{\tau }_1}\cdot \left(1-\frac{{\tau }_2}{{\tau }_2-{\tau }_3}\cdot e^{-t/{\tau }_2}+\frac{{\tau }_3}{{\tau }_2-{\tau }_3}\cdot e^{-t/{\tau }_3}\right)$ (24)

As indicated by Eq. (24), where B is a constant, the pulses have an exponentially decaying tail with a decay time of τ₁. The decay time is determined by the electronic circuits of the preamplifier [1]. The leading-edge time τ₂ in Eq. (24) is determined by the integration time of the RC-CR filter of the preamplifier in the semiconductor detector system [1]. In Eq. (24), τ₃ represents the buildup time of the response pulse, which is consistent with the charge-collection time [1].

Eq. (24) also indicates that the output signal of the system can be obtained by multiplying the exponentially decaying signal by the output signal of the detector. In Eq. (24), $e^{-t/{\tau }_1}$ can be generated by the convolution transform of the C-R differential circuit, and the other terms on the right-hand side of the equation are similar to the expressions in Eq. (3). Eq. (24) expresses a simple output-signal model for semiconductor detector systems.

In the time domain, the signals given by Eqs. (8) and (24) almost coincided with the adjustment of τ₂ and τ₃ while τ₁ remained the same, as shown in Fig. 5(a). Additionally, in the frequency domain, the signals of the proposed and simple models coincided with the adjustment of τ₂ and τ₃ while τ₁ remained the same, as shown in Fig. 5(b).

Fig. 5Full-screen View

(Color online) Signals simulated using the proposed model (τ₁ = 200 ns, τ₂ = 50 ns, τ₃ = 10 ns) and the simple model (τ₁ = 200 ns, τ₂ = 50 ns, τ₃ = 19 ns). a Time domain. b Frequency domain.

As shown in Fig. 5, the new model of the semiconductor detector system was similar to the output-signal model proposed in [1] in the time and frequency domains. The two models can both be used to simulate SDD signals for time–frequency analysis and have no significant differences. However, the experimental results indicated that there were differences between the models with regard to the unit IRS for SDD signals.

Attempt on unit IRS

To test the output-signal model, a traditional unit IRS method was used. The traditional method is based on the Z-transform, which is described by Eq. (25). Here, V_o(z) and V_i(z) represent the Z-transforms of V_o(t) and V_i(t), which are the output and input signals of the semiconductor detector system, respectively. $H\left(z\right)=\frac{V_o\left(z\right)}{V_i\left(z\right)}=\frac{1}{V_i\left(z\right)}$ (25)

If V_i(t) is defined by Eq. (24), Eq. (25) can be rewritten as follows: $H\left(z\right)=\frac{1-d_1\left(1+d_2+d_3\right)z^{-1}+d_1{}^2\left(d_2+d_2{d}_3+d_3\right)z^{-2}-d_1{}^3{d}_2{d}_3{z}^{-3}}{d_1\left({\tau }_2\left(1-d_2\right)+{\tau }_3\left(d_3-1\right)\right)z^{-1}+d_1{}^2\left(\left({\tau }_2-{\tau }_3\right)d_2{d}_3-{\tau }_2{d}_3+{\tau }_3{d}_2\right)z^{-2}},$ (26) Where $d_1=e^{-T_s/{\tau }_1}$, $d_2=e^{-T_s/{\tau }_2}$, and $d_3=e^{-T_s/{\tau }_3}$, with T_s being the sampling period.

A digital solution for the signals of the semiconductor detector system in the time domain is given by Eq. (27), which is obtained from Eq. (26) using the inverse Z-transform. $Y\left[n-1\right]=\frac{X\left[n\right]-d_1\left(1+d_2+d_3\right)X\left[n-1\right]+d_1{}^2\left(d_2+d_3+d_2{d}_3\right)X\left[n-2\right]-d_1{}^3{d}_2{d}_{3}X\left[n-3\right]-d_1{}^2\left({\tau }_3{d}_2-{\tau }_2{d}_3+\left({\tau }_2-{\tau }_3\right)d_2{d}_3\right)Y\left[n-2\right]}{d_1\left({\tau }_2\left(1-d_2\right)+{\tau }_3\left(d_3-1\right)\right)}$ (27)

If V_i(t) is defined by Eq. (8), the following digital solution can be obtained: $Y\left[n-1\right]=\frac{X\left[n\right]-\left(d_1+d_2+d_3\right)X\left[n-1\right]+\left(d_1{d}_2+d_1{d}_3+d_2{d}_3\right)X\left[n-2\right]-d_1{d}_2{d}_{3}X\left[n-3\right]-\left(c_1{d}_2{d}_3+c_2{d}_1{d}_3-c_3{d}_1{d}_2\right)Y\left[n-2\right]}{d_1{c}_3+d_2{c}_3-d_1{c}_2-d_2{c}_1-d_3{c}_1-d_3{c}_2},$ (28) where $d_1=e^{-T_s/{\tau }_1}$, $d_2=e^{-T_s/{\tau }_2}$, $d_3=e^{-T_s/{\tau }_3}$, $c_1={\tau }_2-{\tau }_3-\frac{{\tau }_2\cdot {\tau }_2}{{\tau }_2-{\tau }_1}+\frac{{\tau }_3\cdot {\tau }_3}{{\tau }_3-{\tau }_1}$, $c_2=\frac{{\tau }_1\cdot {\tau }_2}{{\tau }_2-{\tau }_1}$, and $c_3=\frac{{\tau }_1\cdot {\tau }_3}{{\tau }_3-{\tau }_1}$, with T_s being the sampling period.

The SDD signals obtained from the ADC were tested via Eqs. (27) and (28), that is, using the simple and new models, respectively, and the results are shown in Fig. 6.

Fig. 6Full-screen View

(Color online) Unit IRS of acquired SDD signals. a Unit IRS of acquired SDD signals using the simple model. b Unit IRS of acquired SDD signals using the new model. c Unit IRS using the simple and new models.

As shown in Fig. 6(a), the unit impulses of the SDD signals obtained using the simple model oscillated. Fig. 6(a) also indicates that the undershoots of the pulses were large. Longer tails appeared after the pulse undershoots were eliminated by adjusting τ₁, τ₂, and τ₃, as shown in Fig. 6(c). The tailing phenomenon is attributed to the fact that the output-signal model described by Eq. (24) lacks the support of a physical model. The output signal expressed by Eq. (24) is the product of two signals with clear physical meaning. In a linear system, one signal cannot be directly multiplied by another signal.

As shown in Fig. 6(b), the shaped pulses obtained using the new model had no undershoot. Fig. 6(c) presents the results for the two shaping methods. The unit impulse obtained using the new model was narrower than that obtained using the simple model. Additionally, the unit impulse obtained using the new model had a shorter tail, while the noise remained at the same level. It can be concluded that the new model outperformed the simple model for processing overlapping signals.

Quantitative comparison of output-signal models

Typically, the total full width at half maximum (FWHM) of the peaks is used to evaluate digital pulse shapers [23,24]. However, there are several other methods for comparing unit IRS algorithms. In this study, two methods were employed: comparing the average peak base widths of the impulses and comparing the total areas of the impulses (a smaller total area corresponds to better unit IRS).

The SDD signals were tested using the two output-signal models. After adjustment of τ₁, τ₂, and τ₃, the average amplitudes of the impulses obtained using the two models were essentially identical. The experimental results indicated that the total FWHMs and SNRs obtained using the two models had no significant differences.

However, the average peak base widths of the output shaped pulses obtained using the simple and new models were 6.017 × 50 ns and 3.793 × 50 ns, respectively; that is, the average peak base width was 36% smaller for the proposed model. Let the area of the impulse obtained using the new model be A_n and the area of the impulse obtained using the simple model be A_s. Then, ∑A_n and ∑A_s represent the total areas of the impulses obtained using the two models. SDD signals with a length of 1000 were tested. The value of ∑A_n was 1.459× 10⁵, the value of ∑A_s was 1.727× 10⁵, and the value of ${\displaystyle \sum A_n}/{\displaystyle \sum A_s}$ was 84%. Additionally, for the simple model, small pseudo-peaks appeared on tails when the SDD signals overlapped significantly. Pseudo-peaks result can in pulse-counting rate errors. The results indicated that the new output-signal model described by Eq. (8) agreed better with the output SDD signals than the simple model proposed in [1].