Charge track structures characteristics

Upon the impact of heavy ions on semiconductor materials, energy loss primarily occurs through the generation of high-energy secondary electrons, consequently establishing a nonequilibrium charge distribution region along the ion transit path. Within this charged region, the innermost core is characterized by an exceptionally high density of electron-hole pairs, surpassing 1×10²² cm^-3. Subsequently, the carrier densities decrease quickly in regions further away from the center [4]. The temporal evolution of the excess carriers in the initial track structure relies on three mechanisms: recombination, diffusion, and drift. Excess carriers in the high-density core experience an exponential decline, primarily driven by Auger recombination, whereas the remaining carriers in the outer regions primarily undergo Shockley-Read-Hall (SRH) recombination [1, 20]. For ions with similar LETs, the total charge in the material remains the same. Nevertheless, the initial radial distribution of the charge density deposited in the material by ions of different energies varies. These disparities have a substantial influence on the subsequent charge collection [2, 21-24].

Figure 7 depicts the charge track structures of heavy ions at different energies with LETs of 35 and 75MeV·cm²·mg^-1, simulated by Geant4. In the simulation, we established a lateral size of 10 μm × 10 μm, which was sufficiently large to ensure the deposition of all electron-hole pairs within this area. Furthermore, we set the collection depth to 1 μm. The number of incident ions was 1e4, and the resulting charge-track radial distribution was the average distribution of the individual heavy ions. At an LET of 35MeV·cm²·mg^-1, low-energy heavy ions produced a significantly higher charge density at the core of the charge track, surpassing that generated by high-energy ions by an order of magnitude over a radial scale of 10 nm. Conversely, high-energy heavy ions generated a more extensive charge distribution that spread across a radius up to 10 μm. With an increase in LET to 75MeV·cm²·mg^-1, the charge density within the track for both low- and high-energy ions experienced a noticeable increase, yet the disparity in charge density at the core of the track diminished [25]. Moreover, two heavy ions (low-energy ions at LETs of 35 and 75MeV·cm²·mg^-1), possessing comparable amounts of energy per nucleon, exhibited similar charge-track radii. With an increase in ion mass, there was a corresponding increase in the charge deposited within an identical track radius.

Fig. 7Full-screen View

(Color online) Charge track structures of heavy ions at different energies

The response of the deposited charges in the circuits has a complex coupling with the incident particle properties and device structure. Traditionally, the critical charge Q_crit is defined as the minimum charge that must be collected for SEU to occur, and the critical charge density N is determined by the critical charge and the sensitive volume: $N=\frac{Q_{\text{crit}}}{V}$ (4) With advancements in technology, both the critical charge and volume have decreased, but the volume has decreased more rapidly [26]. Referring to data from [26], we calculated the trend of the critical charge density with the technology node, as depicted in Fig. 8. The critical charge density exhibits an increasing trend as technology nodes advance. Based on the data presented in the figure, the critical charge density for the 28 nm technology node is approximately 5×10¹⁸ cm^-3.

Fig. 8Full-screen View

Critical charge density trend with technology node

When the ion deposition charge exceeds the critical charge of the device, the OFF transistor drain collects sufficient charge to flip the cell by drift and diffusion. This process is known as direct charge collection (DCC) [27]. However, for advanced node devices, well potential perturbations can also cause SEUs in regions smaller than the critical charge density. This is because charges that are not directly collected cause a potential gradient from the impact location to the well contact, which can activate the parasitic bipolar effect (PBE) of the MOSFETs, resulting in source-injected charge collection of multiple MOSFETs within the well [28-30]. The range of the well potential perturbation is significantly greater than that of the DCC, which is inversely proportional to the doping concentration of the well [29]. Excess carriers that are not exported by the well contact propagate far from the hit position. As the concentration approaches the well doping concentration, the majority of carriers provided by the impurity atoms in the well dominate the potential. Consequently, at this point, the potential perturbation is not sufficient to breach the intrinsic barrier of the P/N junction. For the 28 nm SRAM tested in this experiment, the cell was not affected by the ionized charge density if it decreased to approximately the substrate doping concentration of 1×10¹⁶ cm^-3.

Therefore, the track structure of the ionization charge distribution can be divided into three distinct sections. The predominant charge collection mechanism varies across different charge-track ranges. The first region represents the area where the ionization charge density surpasses the critical charge density. A sensitive OFF transistor drain situated within or in proximity to this region can directly accumulate sufficient charge by drift, diffusion collection, and PBE collection in the MOSFET itself to trigger a bit flip. This is defined as the DCC-dominated region. In the second region, although the deposited charge is not sufficient for the sensitive node to collect more than the critical charge, the PBE activated by the well potential perturbation contributes a major charge that is sufficient to flip the cell. This area is defined as the PBE-dominated region. The final section comprises the remaining area, wherein the perturbation of the well potential is insufficient to trigger the PBE. Depending on the critical charge density and substrate doping concentration, only approximately 100 nm within the initial charge track is DCC dominated, and the PBE-dominated region reaches the maximum range of 2 μm, as shown in Fig. 7.

MCU pattern and charge collection mechanism

When heavy ions of varying energies impact a 6T SRAM storage array, multinode charge collection generates distinct MCU patterns owing to different charge collection mechanisms and strike locations. Figure 9 and Fig. 10 show the MCU patterns of low- and high-energy ions at a vertical incidence with LETs of 35 and 75MeV·cm²·mg^-1, respectively. In the medium-LET region, the MCU patterns are composed of a series of consecutive MCUs with N rows × 1 column or N rows × 2 columns. Based on the schematics shown in Fig. 11, the layout of the 28 nm SRAM features alternating arrangements of N and P wells. When ions hit the N well, the charge drift, diffusion, and PBE along the well affect the OFF transistor drain of a column of PMOS in the well, resulting in the formation of MCU patterns with N rows × 1 column. Meanwhile, after the ions strike the P well, the deposited charge affects the sensitive drains of the two columns of the NMOS in the well through the charge-sharing effect, resulting in continuous MCU patterns of N rows × 2 columns [17, 31].

Fig. 9Full-screen View

(Color online) MCU patterns of low- and high-energy ions at vertical incidence with an LET of 35MeV·cm²·mg^-1

Fig. 10Full-screen View

(Color online) MCU patterns of low- and high- energy ions at vertical incidence with an LET of 75MeV·cm²·mg^-1

Fig. 11Full-screen View

(Color online) Memory array schematic for 6T SRAM involving nine cells. The red area denotes the OFF transistor drain

When the LET is 35MeV·cm²·mg^-1, as shown in Fig. 9, low-energy ions are capable of inducing 9-bit MCUs, while high-energy ions are limited to a maximum of 7-bit MCUs. Additionally, regardless of their impact on the P or N wells, low-energy ions exhibit a broader range of influence than high-energy ions. Based on the analysis of the critical charge density, as shown in Fig. 7, the DCC-dominated region is limited to the sensitive node within a proximity of approximately 100 nm from the impact point. However, the maximum radius along the well for heavy ions extends from 3 × 270 nm, suggesting that PBE is the dominant charge collection mechanism within the range of 100 nm to 810 nm.

With an increase in the LET, the deposited charge increasingly perturbs the well potential, leading to a more complex multinode collection process and diverse MCU patterns. Not only does this lead to the occurrence of interval MCUs situations, but also results in a low probability of MCU patterns in N rows × 3 columns, as shown in Fig. 10. This is a notable distinction from the MCU situation observed in 65 nm SRAM [17].

First, upon reaching an LET of 75MeV·cm²·mg^-1, the emergence of interval MCU patterns can be observed. This phenomenon was analyzed as a consequence of upset and recovery of cell. This can be attributed to competition of the PBE within an SRAM cell [27, 32]. As illustrated in Cell 1 of Fig. 11, when the N-well potential collapses from electron accumulation, the PBE occurs in the PMOS situated within the N well. As a consequence of drift, diffusion, and the PBE accumulating sufficient charge, the sensitive drain of P1 undergoes a flip. This event further induces a forward bias in the source of P2. Because of the placement of contact points on both sides of the well in this device, the prompt removal of the deposited charge from the well is impeded, resulting in a sustained disturbance of the well potential. Consequently, P1 and P2 simultaneously accumulate charges, initiating a competitive process between the voltages of the two nodes. Following the persistence of the state of "weak 1" for a period, the final flip state of the SRAM cell is determined by the amount of charge accumulated by the P1 and P2 [27].

Additionally, there is a minor probability of MCU patterns in the form of N rows × 3 columns under a high LET. Along the direction of the bitline, the diffusion of heavy-ion charges is influenced by the potential barrier between the wells. In larger technology nodes, a wider well facilitates a more comprehensive collection of ionized charges within the well. However, at the 28 nm node, the width of the P well measures 0.37 μm, and the N well has a width of only 0.21 μm, whereas the range of influence of heavy ions can reach approximately 1 μm. Consequently, the energy loss of heavy ions can affect the three SRAM cells. As shown in Fig. 11, when high-LET heavy ions strike the N well as shown in the black circle, the sensitive nodes of SRAM Cell 2 within the N well can directly accumulate charge and flip. In the P well, located on the left side of the N well, the electron-hole pairs generated by the energy loss of high-energy secondary electrons are collected by the sensitive node of SRAM Cell 1 through the diffusion process. Concurrently, on the right side, excess carriers migrate towards the depletion layers of the P and N wells of SRAM Cell 3 and are subsequently collected by the N well. Owing to the increase in charge collection in this area, the potential of the N well collapses, resulting in the injection of P-source holes. This injection eventually triggers the PBE, which also flips Cell 3. This outcome stems from indirect charge collection and is thus exclusive to occurrences at high LET levels.

In Fig. 10, at an LET of 75MeV·cm²·mg^-1, both low- and high-energy ions can induce the highest order MCUs of 13 bits, encompassing an impact radius of up to 5 cells, corresponding to an approximate range of 1.35 μm. Corresponding to Fig. 7, this range is near the maximum range of the PBE, suggesting that at an LET of 75MeV·cm²·mg^-1, the MCU is approaching saturation.

Dependence of ion energies on charge collection mechanisms

In summary, the distinction between MCUs in various LET regions depends on the charge collection mechanism, which is affected by the energy of the heavy ions. This is discussed in more detail below.

When the LET was 10MeV·cm²·mg^-1, the concentration of the charge deposited by the heavy ions remained low. Only the cells positioned close to the core were able to collect adequate charge through drift and diffusion. Owing to the generation of higher ionization charge densities within the DCC-dominated region by low-energy ions, the minority carriers possessed an extended lifespan and greater diffusion distance through SRH recombination, resulting in an increased MCU [17]. Figure 5 illustrates that the MCU predominantly manifests as two and three bits for both low- and high-energy ions. In addition, the proportions of 3- and 4-bit MCUs were higher for low-energy ions than for high-energy ions. The occurrence of 4-bit MCUs may be due to ion incidence at the yellow circle position in Fig. 11, which affects up to four cells by diffusion.

As the LET increased to approximately 35MeV·cm²·mg^-1, there was a gradual increase in the PBE-dominated collection in the multinode charge collection. First, the duration of the potential perturbation increased with an increase in the deposition charge. In addition, the parasitic bipolar gain is determined by the total charge deposited in the sensitive region [28]. As evident from the MCU patterns shown in Fig. 9, heavy ions have a maximum radius of influence of three consecutive cells, which is approximately 0.81 μm. In this region, the wider distribution of high-energy ions has minimal impact on the charge collection process, whereas the higher charge density resulting from the ionization of low-energy ions has a more significant influence on charge collection. Thus, the higher charge deposition of low-energy ions in the well leads to a longer perturbation time in the well potential and a higher bipolar amplification gain compared with high-energy ions. Consequently, there is an increase in the number of MCUs.

At an LET of 75MeV·cm²·mg^-1, low- and high-energy ions can induce an impact radius in the approximate range of 1 μm-2 μm. Within this range, both low- and high-energy ions exhibit a substantial increase in the ionization charge density across the entire charge track under high-LET conditions. Further, the difference in charge density within the central charge-track region decreases. It should also be noted that the wider charge-track radius of high-energy ions is mostly distributed outside the range of PBE charge collection. Hence, they exhibit similar amounts of deposited charge, leading to comparable perturbations in the well potential and a uniform situation in the MCU.

Inverse-cosine law in the effective LET method

In ground-based SEE testing, an effective LET method is frequently employed to simulate ions that are incident vertically at a higher LET by varying the incidence angle. Tilted ions have a greater path length of $1/\cos \theta$ in the sensitive volume than ions incident vertically, and therefore deposit $1/\cos \theta$ times the charge. However, the assumptions inherent in the inverse-cosine law are often not applicable to current small-node devices [33-36]. One of the main reasons for this is that angle-invariant funneling and diffusive charge collection lead to discrepancies between the deposited and collected charges. This discrepancy causes an overestimation of charge collection according to the inverse-cosine law. Additionally, the dominant charge collection mechanism shifts as the angle increases [33]. By contrast, tilted incidence testing for MCU-sensitive devices triggers higher MCU ratios, resulting in an overestimation of the SEE sensitivity of the device [36-39]. For multiple small sensitive volumes, the charge collection mechanism for the anomalous increase in the MCU ratios owing to an increase in the incidence angle is not clear. Therefore, in this section, we discuss the differences in charge collection mechanisms by the tilted incidence of low- and high-energy ions and clarify the applicable range of the inverse-cosine law.

As illustrated in Fig. 12, we compared the SEU cross-section at vertical incidence with the cross-section obtained for low- and high-energy ions using the effective LET method between LETs of 35 and 75MeV·cm²·mg^-1. The results showed a positive correlation between the ion energy and applicability of the effective LET method. Starting with an LET of 35MeV·cm²·mg^-1, the trend in SEU cross-section resulting from high-energy ions at tilted incidences resembles that of vertical incidence. At a tilt angle of 45°, a slightly larger SEU cross-section was observed. However, the distinction between the SEU cross-sections of low-energy ions and zero-angle incident ions tends to initially increase and subsequently decrease.

Fig. 12Full-screen View

(Color online) Comparison of SEU cross-sections for effective LETs of low- and high-energy ions and vertical incidence

In Sect. 3.2.3, we discussed how the distinctions in SEU cross-sections caused by low- and high-energy ions are primarily attributed to variations in the MCU. These distinctions in MCUs are intricately linked to the charge deposition and collection mechanisms. Consequently, variation in the collected charge may emerge as a critical factor affecting the applicability of the inverse-cosine law.

In the low-LET region, as the incidence angle increases, the charge collection mechanism changes from drift-dominated to diffusion-dominated. Consequently, the amount of charge collected by the sensitive volume decreases [36]. We also observed changes in the charge collection mechanism as the angle increased in the medium-LET region. First, as shown in Fig. 7, the influence radius for the DCC-dominated region is only approximately 100 nm, resulting in a maximum of 4-bit MCUs. Because of angle-invariant funneling and diffusion collection [40], we assume that the impact of the DCC-dominated region remains, at most, on the 4-bit MCUs. Thus, we calculated the DCC-dominated proportion at various angles, specifically, the proportion of ≤ 4-bit MCUs, as shown in Fig. 13. When the LET of the vertical incidence is 35MeV·cm²·mg^-1, the dominant charge collection mechanism is DCC for both low- and high-energy ions, as the DCC-dominated proportion exceeds 60%. As the angle increases, the DCC-dominated proportion decreases to varying degrees for both low- and high-energy heavy ions. This suggests that the PBE produces more high-order MCUs.

Fig. 13Full-screen View

(Color online) DCC-dominated percentage trends with incidence angle

Notably, at a 15° angle, the DCC-dominated proportion of low-energy ions decreases to approximately 50%. This suggests a transition in the predominant mechanism governing the MCU from DCC to competition between DCC and PBE. Conversely, high-energy ions continued to be dominated by DCC up to an incidence angle of 30°, beyond which there was a shift in the charge-collection mechanism. As the incidence angle further increased to 60°, the DCC-dominated proportions were comparable for both low- and high-energy ions; therefore, the distinction in the SEU cross-sections is attributed to variations in higher-order flips, as shown in Fig. 6(a). This observation implies that at this point, the extent of charge collection is predominantly influenced by the PBE, indicating the dominance of PBE charge collection.

Therefore, we establish two rules: First, increasing the incidence angle does not cause a shift in the primary charge collection mechanism. Second, the incidence angle should not alter the proportion of the sensitive region within the cell, meaning that the event cross-section remains unchanged. Conforming to both rules is essential for applying the inverse-cosine law when tilting heavy ions toward a small sensitive volume.

Figure 4(a) illustrates that in the medium-LET region the event cross-section remains consistent across all angles, aligning with the second rule. Nevertheless, in Fig. 13 the dominated charge collection mechanism for the low-energy heavy ions undergoes an abrupt shift immediately upon the initiation of the tilt angle. As a result, the SEU cross-section of the low-energy ions consistently exceeded the fitted curve for vertical incidence, except at 60. However, it was only at approximately 45 that the charge collection mechanism of high-energy tilted ion incidence transformed into a competition between DCC and PBE, resulting in a slightly higher cross-section than the fitted curve. The distinction between low- and high-energy ions arises from the discrepancy in the ionization charge density within the charge track core, with low-energy ions exhibiting a markedly higher density than their high-energy counterparts. Despite the similarity in LET for both low- and high-energy heavy ions, the total charge deposited by low-energy ions exceeded that of high-energy ions across the entire scope of influence associated with DCC and PBE. Consequently, when low-energy heavy ions are tilted, they deposit a larger amount of charge along the path within the sensitive volume. Furthermore, the increased charge deposition within the well amplifies the well potential perturbation. Therefore, the dominant charge-collection mechanism becomes more susceptible to the transition from DCC to PBE. The charge-collection mechanism underwent a complete shift from DCC-dominated to PBE-dominated until the tilt angle reached 60°. This resulted in SEU cross-sections for both low- and high-energy ions resembling the cross-section for vertical incidence. In conclusion, we recommend using high-energy heavy ions to achieve a higher LET through tilted incidence in the medium-LET region.