2.1. CFD unit

To eliminate the time walk effect caused by both the amplitude and edge variation of the sensor signal, four CFD circuits were designed to process the start and stop signals, mainly comprised of an amplifier, two comparators, two D-flip-flops (DFFs), and an AND-gate, as shown in Fig. 3. In view of the fast leading-edge signals generated by both the MCPs and CEMs, a fast current-feedback amplifier with enough bandwidth (AD8001, from ADI Corp.) for every channel was employed to magnify its feeding negative pulse after capacitive coupling, without seriously slowing the signal edge containing the timing information. Then the amplified signal output from AD8001 was split into three parts, with one part fed to the negative end of a high-speed comparator (MAX9202) after a fixed delay and a second part delivered to the positive end with an amplitude attenuation achieved by a resistance divider. The relationship between the attenuation ratio and delay length can be described by equation (2):

Fig. 3Full-screen View

Schematic of the CFD circuitry.

where t_d is the delay length of the delay line, f is the amplitude attenuation ratio, and t_r is the forward-edge pulse time.

To remove miss-firing caused by noise or interruption to the CFD discriminator, a coincidence circuit containing a comparator, DFF, and an AND-gate was added. Both the third part from AD8001 and a threshold voltage controlled by a digital-to-analog converter (DAC) shared by all CFDs were sent to the negative and positive ends of the comparator, respectively. If the signal exceeded the threshold voltage applied to the comparator, the output was true until the signal dropped below the threshold. After tracking the rising edge, both the DFFs were fed to an AND-gate to produce an event coincidence.

2.2. FPGA–TDC unit

There were four equal channels of the TDC designed in high reliability flash-FPGA (APA1000, from ACTEL Corp.) corresponding to the CFDs [16]. A couple of TDC channels were occupied by a valid event generating start and stop signals. As shown in Fig. 4, each channel TDC had a configurable 9-bit counter which constantly counted the clock signal, followed by a 9-bit register to record the counter value when the event signal arose. The 64 OR gates acted as delay units of a delay-chain whose delay length surpassed the clock period of the TDC to interpolate the clock period and 64 DFFs used to record the arrival time of an event signal. After the value of the 64 DFFs was encoded into a 6-bit value by an encoder, both the coarse-time measurement stored in the 9-bit register and fine-time measurement after the 6-bit encoder in each TDC channel, representing the time of an event signal, were fed into a FIFO/RAM unit for data processing by subsequent units with the sequential management of the control unit. The TOF of an event, τ_tof, measured by a pair of TDC channels is expressed by equation (3):

Fig. 4Full-screen View

Block diagram of the TDC converter.

where N_start and N_stop are the latched moments of the register for the start and stop signals, respectively; clk is the clock period; n_start and n_stop are the encoded fine moments for the start and stop signals, respectively; m_start and m_stop are the covered lengths for the start and stop channels in one clock and were measured by the code density test.

Furthermore, an event interval coincidence unit was added to determine and filter invalid events according to the time length threshold, which differed from the leading discriminator of the CFD whose function was to filter noise or interruptions.

2.3. Status monitoring unit

A precise monitor circuit (Fig. 5) was designed to collect the operating status of different aspects including all seven types of HV supply, multipoint temperature, and working currents. Twenty-two channels of status were asynchronously acquired via three multiplexes and shared a signal conditioning chain constituted by an amplifier, a 16-bit resolution ADC (AD976A), and 16-bit buffer protecting FPGA pins from overvoltage damage by providing an interface of shifting logic voltage from a +5 V operation to +3.3 V operation. Because both fixed HVs and the steps of sweeping HV (not the rising or descending interval of adjacent steps) changed slowly, the robust AD976A with 200 ksps sampling rate and > 83 dB S/N (the ratio of signal to noise) was adequate for accurate measurements of the various statuses. Another important feature was that the AD976A supported a ±10 V range for analog input under a +5 V supply environment, which is a significant benefit in enhancing the measuring precision under a large voltage difference, such as sweeping HV steps from several volts up to thousands of volts.

Fig. 5Full-screen View

Simplified diagram of the status monitoring circuitry.

2.4. Control and data processing unit (CDPU)

The CDPU, whose function was to govern each unit and process both the science and status data, can be divided into nine parts, as shown in Fig. 6. Under different commands sent by a satellite-computer and parsed by command parser unit, the subcell and mode manage unit was in charge of the other seven units. Incident events hitting different anodes at 32 energy steps were recorded by 14 counters (24-bit), followed by a 24-to-8-bit compressor before entering the RAM for cache. Details regarding the compression algorithm are given in Ref. [17]. The TDC data from the TOF signals was firstly online corrected by a correction algorithm based on INL compensation [18]. Then, the corrected TDC data were fed into a unit where either the raw data or data of mass-per-charge look-up table (M/Q LUT) was determined and sent to the RAM according to the TOF mode configuration. The M/Q LUTs were generated by a classification algorithm based on the basic relationships presented by equation (1) for various main species. The monitoring data from various statuses in an energy step emerged and were assembled, then written into the assigned areas in RAM. Under different working modes, various data which were optional from the TOF data, position data, and status parameters, were sent to the upper computer after data packing and framing. Owing to the confined capacity of the RAM in FPGA, an external RAM was exploited to increase storage space.

Fig. 6Full-screen View

Block diagram of the CDPU.

2.5. Other units

The control and regulation of different HV supplies for the spectrometer were accomplished by DAC circuits on readout electronics. A 16-bit DAC was used to exactly control the sweeping HV for the electrostatic analyzer, while fixed HVs were set up by configuring 12-bit DACs (TLV5618) on the basis of potential demands. In order to obtain a 22.5ºangular resolution of an incident particle, 14 channels of CEM signals were conditioned by A121 hybrid chips composed of amplification and discrimination circuitry that can cover 12 MHz event rates with a low noise level [19]. As for the HV supply of the detector, a similar design scheme is described in Ref. [17].

Additionally, 16 narrow pulse signals were furnished by a built-in test circuit to stimulate the CFDs and A121s. The A121s were allotted with 12 test signals, configured from 12 selectable repetitive frequencies with the largest periodic event rates up to 1 MHz to check each signal chain. While the other four test signals were allocated into two pairs of signals, and each pair had two optional fixed intervals at repetitive frequencies equal to that of the A121s to check the CFD signal chain..

Because of the harsh radiation effects in the space environment, in particular single events effect (SEE) and total ionizing dose (TID) which are prone to cause damage or destruction to components [20], different techniques have been considered and adopted on our electronics to mitigate or eliminate these effects, for example, top priority to high-tolerance chips, triple module redundancy techniques, hardware redundancy, and watchdog technique for program exception. More details on radiation mitigation can be found in Refs. [17] [20].

3.1. Electronics test

A. CFD test

As shown in Fig.7 (b), a signal generator (TEK AFG3252) output a channel of sharp negative pulse with 2 MHz repetitive frequency and a synchronizing signal (TTL level) that was immediately transmitted to an oscilloscope. The analog signal was firstly attenuated by a passive attenuator and then fed to one channel of the CFD whose attenuation ratio (f) was 0.3 and delay length (t_d) was set to 2 ns, generating a timing signal that was sent to another channel of the oscilloscope. By adjusting the amplitude and leading edge of the negative pulse in a large range, simulating different detector signals, the timing error caused by the variation of the signal shape was measured on the basis of skew-time, which is the interval difference between the synchronizing (reference signal) and CFD timing signals. This error was the deviation of the skew-times viewed and counted on the oscilloscope. Considering an extra small devotion to the signal shape deviation by the smoothing of the passive attenuator, three leading edges (2.5, 3.5, and 4.5 ns) signals simulating the bad cases in the practical experiment were installed for the CFD timing testing. The relationship between the timing error and signal shape variation is shown in Fig. 8. Each curve showed a drastic drop in the amplitude range of 10 to 35 mV, becoming flat or changing little beyond 35 and up to 500 mV.

Fig. 8Full-screen View

(Colorl online) Relationship between the timing error and signal shape variation.

B. TDC test

A code-density test was carried out to determine the non-linearity of the TDC and then was combined with the fixed-delay test (similar to the cable delay test) to ascertain the uncertainty of the TDC with statistical methods based on a large number of measurements of random input time intervals [18][22], as shown in Fig. 7 (c). Two channels of negative random pulses produced by a generator with a repetitive frequency, sufficiently different from the reference clock of the TDC circuitry, and start and stop signals delayed by a fixed time relatively to the start signal, were fed into two channels of the CFD board. Then, a pair of timing signals generated by CFD were sent to the DPU board for the TDC measurement and the data was transferred to an upper computer for the statistical analysis and displayed using a LabView program. As the timing signals were random to the TDC's clock signal, every delay unit of the delay chains in the TDC circuit was distributed with an amount of hits. The hits of each bin for one channel TDC were counted in the histogram shown in Fig. 9 (a). The code density test showed that the clock period (25 ns) of the TDC was interpolated into 46 parts by a delay chain, namely, a time resolution of ~550 ps was reached for the TDC. According to the difference between the counting of each bin and their ideal hitting number, both differential nonlinearity (DNL) and INL, normalized to the least significant bit (LSB), were obtained and shown in Fig. 9 (b). The fixed delay interval was also measured by subtracting the TDC values of the stop channel from those of the start channel. With a 635-ns delay interval installed on the generator, the time interval was recorded by the TDC, and was shown without and with INL correction in Figs. 10 (a) and 10 (b), respectively. The results with another 3.1 μs fixed delay were shown in Figs. 10 (c) and 10 (d). Gaussian fitting was performed for the statistical results of both before and after INL correction. According to the statistical analysis, the time uncertainty expressed as the root mean square (RMS) was significantly reduced after the correction.

Fig. 9Full-screen View

(Colorl online) Result of the TDC non-linearity test: (a) code density test, and (b) DNL and INL tests.

Fig. 10Full-screen View

(Color online)TDC uncertainty test under: (a) 635 ns fixed delay without INL correction, (b) 635 ns fixed delay with INL correction, (c) 3.1 μs fixed delay without INL correction, and (d) 3.1 μs fixed delay with INL correction.

3.2. Beam test

A beam test system underground-based vacuum facility was constructed at the Hefei National Laboratory for Physical Sciences at Microscale. This TOF mass imaging system includes an electron gun chamber, a reaction chamber, and gas source, and a simplified schematic diagram is shown in Fig. 11 (a). A pulsed electron beam from a thermal cathode electron gun is injected into the reaction chamber to collide with the gas target (N₂) at the reaction center. After collisions between the electrons and N₂ gas, a voltage pulse is applied on the pushing electrode to create a uniform field at the reaction area, aimed at extracting the fragment ions into the detection system composed of a pair of MCPs in chevron configuration followed by delay line anodes (DLD120). A more detailed description of the system is provided in Ref. [23].

Fig. 11Full-screen View

(Color online) (a) Diagram of the beam test system. The TOF imaging was in the vacuum chamber while the readout electronics was outside. (b) Test field of the electron beam impacting on N₂ gas.

The test field is shown in Fig. 11 (b). Our readout electronics were equipped with the TOF system using custom connectors and coaxial cables to receive a pair of TOF signals and measure the travel time of different species produced by collisions with a 362-eV electron beam. The TOF data were on-line processed and updated in real-time when new packets were transmitted from the DPU board to the computer. Fig. 12 (a) shows the TOF spectrum of ions from the N₂ gas decomposition under a lot of statistical data. The top most peak represented the species of N²⁺, and the short peak with a broadening bottom was the pileup of both N⁺ and N₂²⁺ ions. In addition, an existing experimental TOF readout system with time resolution < 50 ps from Hefei National Laboratory for Physical Sciences at Microscale [23] was also applied to measure the TOF spectrum of the N₂ ion fragments, for comparison. The results were shown in Fig. 12 (b).

Fig. 12Full-screen View

TOF spectrum of ions produced from the 362-eV electron impact on the N₂ gas: (a) Results of the TOF electronics, and (b) test results of an existing experimental TOF readout system from the Hefei National Laboratory for Physical Sciences at Microscale.

4.1. CFD timing error

The test results confirmed that the CFD circuit reached a low timing dispersion of <200 ps in the large amplitude range from ~35 to 500 mV (even more than 500 mV) for all three leading edges. Compared with the timing accuracy of <300 ps for the ULEIS instrument on the ACE spacecraft [24], our CFD was capable of accomplishing precise timing for both MCPs and CEM detectors whose high gain and fluctuation effects yielded a broad pulse height distribution of typically tens to several hundred mV as reported by G Gloeckler [25]. In addition, a 2 MHz repetitive pulse was used due to the limit of the reference signal, but the CFD circuits can work normally beyond a 10 MHz input frequency, which significantly exceeds the requirement of the event-rate for the physical experiment.

4.2. TDC range, resolution, and accuracy

As the coarse counter was configured as 8-bit, it can reach a dynamic range of 6.4 μs at 25 ns clock period. Owing to the non-uniformities in both the delay cells and routes in the FPGA, the TDC presents an INL of 0.36 (LSB) that led to an increase of measuring error for the fixed delay test. From the fixed delay test of 635 ns and 3.1 μs, a better uncertainty of <180 ps was clearly obtained with the INL correction. Compared with similar experiments, our TDC time resolution of ~550 ps was better than the 2.5 ns time resolution of the HOPE instrument which uses a similar technique (Van Allen probes mission) [13], and was also better than the time resolution (750 ps) of the ion mass spectrometer on the operating CASSINI mission [26]. These results indicate that our FPGA-TDC satisfies the time measurement demands.

4.3. TOF spectrum

In the electron beam test, the fragment ions from the N₂ decomposition were clearly discriminated by our readout electronics. Since the ionization cross sections for the production of N₂⁺ were higher than those of the production of N₂²⁺ + N⁺, the counts of N₂⁺ in the TOF spectrum were much greater than those of N⁺ + N₂²⁺. This result is in line with H. C. Straub's measurement [27]. Moreover, by comparison, our TOF spectrum was similar to the results of the experimental TOF readout system, except for a fixed offset of ~330 ns, which was set to avoid the transient electromagnetic interference at the moment providing a strong extraction field for the start TDC channel in the experimental TOF readout system. Although the beam test was equipped with a TOF imaging system, this result suggests that our electronics works well for ion species measurements. A subsequent beam test for our TOF system with an ion composition analyzer is still currently being designed because of its complexity and elaboration.